Electronics Forum | Sun May 20 01:37:58 EDT 2012 | vileo72
Hi , Thanks for the link and could understand the limit setting . Regards Vikas
Electronics Forum | Mon Jun 04 00:38:17 EDT 2012 | vileo72
Hello friends , Any leads !! Regards Vikas
Electronics Forum | Fri May 18 04:04:18 EDT 2012 | vileo72
Dear brotakul , Please let me know if the white paper is traced as the link given is not active . Thanks Vikas
Electronics Forum | Fri May 18 09:58:45 EDT 2012 | capse
Dear brotakul , Please let me know if the white > paper is traced as the link given is not active > . > > Thanks Vikas hello, Chrys recently updated her website; here is the new link http://www.sheaengineering.com/wpapers.html
Electronics Forum | Fri Jun 01 05:46:12 EDT 2012 | vileo72
Hello friends , What is the extent of Probe mark allowed on a assembled board ? Is there any related material on net or standard .Recently we had an issue where the ICT was done and the joints on which the pins were tested had dents on the joints
Electronics Forum | Tue Jun 05 02:22:07 EDT 2012 | vileo72
Dear Dave/pr/Reese, Thank you so much for the information and this will certainly help me to align on the query .Would like to know further :During Flying probe testing the vias are also observed that they have pin mark on the annular ring due to the
Electronics Forum | Thu Dec 26 08:40:21 EST 2013 | vileo72
Hi , During one of NPI trial ,we found that boards ( CEM -1 grade )has got discolored on the masking portion ( and not on the conductors) after reflow .Although it does not impact our Form /Fit and Function characteristics , I would like to get your
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