Electronics Forum | Wed Jun 01 23:09:46 EDT 2016 | slouis2014
Hi, can anybody give an idea how to lessen the void on a double ground pad IC. I have tried to change the stencil design, change the solder reflow setting. but i still haven't reach 75% solderability. thanks alot
Electronics Forum | Thu Jun 02 22:26:46 EDT 2016 | slouis2014
i have tried to design the stencil as attached, but the void is more than 35%. do you have any idea what is the ideal diameter for the stencil aperture for the solder to spread and the flux to be released out of the component simultaneously. thanks a
Electronics Forum | Thu Jun 02 08:42:06 EDT 2016 | emeto
Several important things to watch. 1. More paste can result in more voiding(I usually shoot for 50-65% coverage) 2. Make a different grid(windowpane) for you pad - try with more smaller windows 3. Try both ramp to spike or Soak profiles and see whic
Electronics Forum | Thu Jun 02 22:40:13 EDT 2016 | slouis2014
Hi, yes have a few experiments initially i tried to increase the solder volume but component pin have insufficient solder. 1. The solder coverage do you calculate it by solder volume or solder area. 2. if i would achieve as you recommend 50-60 % woul
Electronics Forum | Thu Jun 02 08:18:06 EDT 2016 | buckcho
Hello, what is the design on the stencil, that you chose? Send us a picture, so we can help you better.
Electronics Forum | Sat Oct 19 11:48:39 EDT 2002 | davef
Good points, John. Continuing to track on the voiding issue, why remove voids anyhow? * Voids are primarily process indicators. There is experimental evidence that voids retard crack propagation locally around the void on at least on a temporary bas
Electronics Forum | Mon Sep 30 09:26:04 EDT 2002 | itempea
Russ, first step would be to get IPC-7095 on BGAs. A few notes: There can be voids in solder balls, or at the solder joints to the BGA, or at the solder joints to the PCB. Various sources or reasons can be responsible for these voids. Voids can be
Electronics Forum | Wed Oct 09 08:55:28 EDT 2002 | russ
okay, so how does the DRS remove voids from BGAs?
Electronics Forum | Mon Oct 21 03:52:38 EDT 2002 | Ben
I'm doing lead-free SMT of BGA with 450 micron ball. I found there are lots of voids under xray, there are around 2-3 voids in every balls. It is around 10% of volume ratio. I would like to ask if anyone know there is any standard of acceptable maxim
Electronics Forum | Mon Oct 21 09:09:54 EDT 2002 | Ben
thanks for ur help. i would also like to know the classes is for showing different level of requirement, or for different vertical location of void in joint. coz I heard from my workmate that the range from 9% to 36% is for void at different vertical
Reflow ovens for automated SMT PCB assembly, specializing in lead free processing and nitrogen reflow. The best convection reflow ovens on the market.
4 Vreeland Rd.
Florham Park, NJ USA
Phone: 973-377-6800