Electronics Forum: what (Page 801 of 1843)

Re: idle machine time

Electronics Forum | Wed Apr 05 22:38:22 EDT 2000 | Dave F

Mike: Claude makes excellent suggestions. I'll add perform more product set-ups to increase the variety of product being assembled to be able to respond to customers better, sell more product, and increase machine loading. So then, you have to ask

AOI proposal

Electronics Forum | Mon Apr 03 04:31:32 EDT 2000 | Jacqueline Coia

Hi there, Just looking for a little informative feedback on an AOI proposal. Along with the test department we are about to embark on a feasibility study on using National Instruments' 'Labview image aquisition'(h/ware + s/ware) as an alternative to

Re: AOI proposal

Electronics Forum | Tue Apr 04 03:44:36 EDT 2000 | Jacqueline Coia

Why not? The same system is already successfully used in other areas of industry, we are already familiar with Labview applications as they are implemented for some of our functional tests. From what I have seen so far it seems viable and less expe

IPC Component ID

Electronics Forum | Tue Mar 28 16:23:44 EST 2000 | Michael Parker

While attempting to use the IPC-SM-782, land pattern calculator, I came across the term Component ID. (for example - "C1005") I am not sure what this is. I wanted to verify the IPC recommended land pattern for a Chip Capacitor with 0603 size. Can any

MicroBGA qualification process

Electronics Forum | Tue Mar 28 14:20:37 EST 2000 | Reggie Malli

Hello there, Is there a microBGA qualification procedure available somewhere? Does anybody have any experience with X-ray laminography, if so, what are the benefits of laminography versus the standard x-ray? Can somebody point out the study about th

BGA Void

Electronics Forum | Mon Mar 27 19:29:14 EST 2000 | Garo Donabedian

I ran six boards with uBGA, and all six have voids 25-30%. I would like to know what would cause this since this is my first time running into this problem. also I would like to know how does a void effect the components function the customer does no

Re: BGA REFLOW PROBLEMS

Electronics Forum | Sat Mar 25 12:13:13 EST 2000 | JAX

Robert, Have you checked for any form of contamination that might cause the solder not to adhere to the balls? From the pictures you have on the net it appears that you have too much solder on the pads. What thickness is your stencil? If it is to sp

Baking FR-4 PWB's prior to reflow

Electronics Forum | Tue Mar 21 17:32:48 EST 2000 | Charles Barker

Greetings all you knowledgable SMT persons! 1. Typically, for multi-layer (6-8 layers), FR4, SMT boards stored in an air conditioned environment at about 50+/- 10% RH, how many months (or years) would you allow to pass before you would recommend bak

Vias Under Discrete Components

Electronics Forum | Wed Mar 15 01:20:08 EST 2000 | Dreamsniper

Do we really need not to locate vias underneath discrete components on a PCB that will be wave soldered after reflow even though we are using no clean process on our wave solder ? What are the possible cause and effect when locating Vias under discre

BGA and PCB finishing

Electronics Forum | Tue Mar 14 05:02:35 EST 2000 | emmanuel

I am to implement PBGA, and i am looking for PCB surface finish informations. A lot of technical reports are specifing NiAu finishing because of flatness property. Because of leads shape, I though that BGA doesn't need flat pads like QFP. Is it false


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