Silicon Test Wafer Specification for 180 nm Technology
Published: |
August 5, 1999 |
Author: |
Goodall, Randy |
Abstract: |
In 1998, the International 300 mm Initiative (I300I) demonstration and characterization programs will focus on 180 nm technology capability. To support these activities, I300I and equipment supplier demonstration partners must use starting silicon wafers with key parameters specified at a level appropriate level for 180 nm processing, including contamination and lithographic patterning. This document describes I300I's silicon wafer specifications, as developed with the I300I Silicon Working Group (member company technical advisors) and SEMI Standards.... |
|
Company Information:
- Aug 05, 1999 - The Effects of Ergonomic Stressors on Process Tool Maintenance and Utilization
- Aug 05, 1999 - Facility Fluids Metrics and Test Methods
- Aug 05, 1999 - Test Structures for Benchmarking the Electrostatic Discharge (ESD) Robustness of CMOS Technologies
- Aug 05, 1999 - Overview of Quality and Reliability Issues in the National Technology Roadmap for Semiconductors
- Aug 05, 1999 - Guide for the Design of Semiconductor Equipment to Meet Voltage Sag Immunity Standards
- See all SMT / PCB technical articles from SEMATECH »
More SMT / PCB assembly technical articles »
- Jan 17, 2023 - Introducing Closed-loop Nitrogen Control To Solder Reflow | Heller Industries Inc.
- Jan 17, 2023 - How Challenging Conventional Wisdom Can Optimize Solder Reflow | Heller Industries Inc.
- Jan 17, 2023 - The User Benefits of a Supplier Partnership | Heller Industries Inc.
- Jan 17, 2023 - Vacuum Fluxless Reflow Technology for Fine Pitch First Level Interconnect Bumping Applications | Heller Industries Inc.
- Jan 17, 2023 - Flux Management | Heller Industries Inc.
- Browse Technical Library »
Silicon Test Wafer Specification for 180 nm Technology article has been viewed 702 times