Analog FastSPICE Platform Full-Circuit PLL Verification

Published:

June 30, 2016

Author:

Mentor Graphics

Abstract:

When designing PLLs in nanometer CMOS, it is essential to validate the closed-loop PLL performance metrics with nanometer SPICE accuracy before going to silicon. Transistor-level, closed-loop PLL verification has been impractical due to traditional SPICE and RF simulator performance and capacity limitations. By using Analog FastSPICE, designers dont have to trade accuracy for performance.

Read this white paper to see how AFS:

  • Delivers closed-loop PLL transistor-level verification
  • Supports direct jitter measurements
  • Produces phase noise results correlating within 1-2dB of silicon

...

  • Download Analog FastSPICE Platform Full-Circuit PLL Verification article
  • To read this article you need to have Adobe PDF installed

You must be a registered user to talk back to us.

 

Company Information:

A leader in software solutions for electroncs design, Mentor Graphics is the only EDA company with a total end-to-end solution for design though manufacturing.

Wilsonville, Oregon, USA

Consultant / Service Provider

  • Phone 800-592-2210
  • Fax 202 4186945

See Company Website »

Company Postings:

(9) products in the catalog

(14) technical library articles

(62) news releases

  • Jun 27, 2022 - INTELLI-Pro -- The Future of Automated Optical Inspection | MIRTEC Corp
  • Jan 28, 2022 - Open Radio Unit White Box 5G | Whizz Systems
  • Nov 10, 2021 - Understanding the Cleaning Process for Automatic Stencil Printers | ITW EAE
  • Sep 02, 2021 - UV Laser PCB Depaneling Machine Improve Cutting Effect | Winsmart Electronic Co.,Ltd
  • Jun 28, 2021 - Understanding the Cleaning Process for Automatic Stencil Printers | ITW EAE
  • Browse Technical Library »

Analog FastSPICE Platform Full-Circuit PLL Verification article has been viewed 905 times

Voidless Reflow Soldering

IPC Certification Training Schedule