Assembly Process Development for Chip-Scale and Chip-Size μBGA™

Published:

May 9, 1999

Author:

Vern Solberg.

Abstract:

This paper will review chip-scale and chip-size package variations, solder alloy options, furnish guidelines for solder stencil development and outline the actual processes used to successfully produce SMT assemblies utilizing CSP technology. ...

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Company Information:

Tessera is focused on miniaturization technologies and has licensed its chip packaging technology to numerous semiconductor manufacturers, including Intel and Samsung Electronics.

San Jose, California, USA

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  • Phone 408-894-0700
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Company Postings:

(1) technical library article

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