Aug 23, 2001 Particularly suited for performance and form factor driven applications, FCT's FOC and RDL process technologies are leading commercial solder bumping and redistribution solutions with a proven track record with STATS' leading customers. The agreement provides STATS with future technology development, site engineering support and more importantly, opportunities for cost and cycle time reduction by locating wafer bumping capabilities and redistribution technology in-house. The flip chip bump process also enables STATS to participate in wafer scale packages, direct chip attach, and integrated passive devices.
"Singapore has emerged as the wafer fabrication center of South East Asia," says K & S Vice President Don R. May. "This partnership with STATS is a continuation of our strategy to proliferate FCT's technology on a global basis."
Said Dr. B. J. Han, STAT S' Chief Technology Officer : "As demand for flip chip technologies escalates in tandem with the growth of ICs required for high performance network communications devices and finer silicon processing technologies enable smaller die size, it is important for STATS to constantly offer advanced packaging technologies in order to provide customers with complete turnkey test and packaging solutions. Wafer bumping and redistribution are silicon wafer processes required for most flip chip packaging applications. FCT's wafer bumping process and redistribution technology has a demonstrated record in producing robust and inherently high yielding results; bringing FCT's technologies in-house completes STATS' existing backend flip chip assembly process. Their technology transfer group will be working closely with our management and engineering staff to bring our line up in record time."
About Kulicke & Soffa Industries Inc. (K&S) and Flip Chip Technologies, L.L.C. (FCT)
Kulicke & Soffa is the world's leading supplier of semiconductor interconnect equipment, materials and technology. Chip and wire solutions combine wafer dicing, die bonding and wire bonding equipment with saw blades, die collets, wire and capillaries. Flip chip solutions include wafer bumping technology, die placement equipment and UltraVia high density substrates. Chip scale and wafer level packaging solutions include Ultra CSP technology. Test interconnect solutions include standard and vertical probe cards, ATE interface assemblies and ATE boards for wafer testing, and test sockets and contactors for all types of packages. Kulicke & Soffa's web site address is http://www.kns.com.
About ST Assembly Test Services Ltd. (STATS)
ST Assembly Test Services ("STATS" - NNM: STTS and SGX: ST Assembly), is a leading semiconductor test and assembly service provider to fabless companies, integrated device manufacturers and wafer foundries. With its principal operations in Singapore and global operations in the United States, United Kingdom, Japan and Taiwan, STATS offers full back-end turnkey solutions to customers worldwide. STATS' expertise is in testing mixed-signal semiconductors, which are extensively used in fast growing communications applications such as data networking, broadband and mobile communications. STATS also offers advanced assembly services and has developed a wide array of traditional and advanced leadframe and laminate based products, including various ball grid array packages to serve some of the world's technological leaders. STATS was listed on the Nasdaq National Market and The Singapore Exchange in January 2000 and is in the Morgan Stanley Capital International (MSCI) Provisional Singapore Index. Further information is available at http://www.stts.com.
Certain of the statements in this press release are forward-looking statements including statements with respect to industry growth, that involve a number of risks and uncertainties which could cause actual results to differ materially. Factors that could cause actual results to differ include : general business and economic conditions and the state of the semiconductor industry; demand for end-use applications products such as communications equipment and personal computers; decisions by customers to discontinue outsourcing of test and assembly services; changes in customer order patterns; rescheduling or cancellation of customer orders; changes in product mix; capacity utilization; level of competition; pricing pressures; continued success in technological innovation; delays in acquiring or installing new equipment; litigation and other risks described from time-to-time in the Company's SEC filings, including its annual report on Form 20-F dated March 30, 2001. The Company undertakes no obligation to publicly update or revise any forward-looking statements, whether as a result of new information, future events, or otherwise.
