Apr 11, 2002 Villach, Austria
Fab tool supplier SEZ Group here and the IMEC research group in Belgium today announced a joint-development initiative for environmentally friendly, "economically viable" wafer cleaning technology that will be used in next-generation IC processes.
As part of the two-year joint development project, SEZ shipped two systems to IMEC for cleaning evaluation and testing. In one part of the program, SEZ's Spin Processor 203 will be used for backside film removal in pre-lithography process steps for yield improvement. The spin processor will also be used for backside and bevel cleaning, such as copper decontamination, and for frontside polymer clean for metal line, via holes and copper dual-damascene technologies.
IMEC and SEZ said they plan to study and develop backside and bevel cleaning processes for "novel high-k materials," which are being considered for transistor gate oxides and other structures. The two partners said they will also investigate backside and bevel cleaning of titanium/titanium-nitride (Ti/TiN) and other metals as a replacement for poly gate films.
Under the program, IMEC and SEZ plan to explore different drying methods and alternative cleaning techniques, which focus on chelating agents and the use of different "Megasonic" systems.
"Next-generation processes require new environmental friendly and economically viable cleaning processes with increased particle removal efficiency for ultra-small particles," said Luc Van den hove, vicepresident silicon process technology division of IMEC in Leuven. The independent research group has worked on wafer cleaning technologies and processes since 1989, he said.
"Cleaning is one of the key elements in the contamination control that allows the introduction of novel materials in a CMOS prototyping line," he explained. "With SEZ's technological capability and support in this field, we believe we can enable the industry to better meet next-generation IC manufacturing requirements."
SEZ has been expanding its wafer-cleaning technology to include both single-wafer systems and batch wet-cleaning technologies for 300-mm fabs (see Feb. 22, 2001, story). SEZ's Spin Processor 1200 is a double-sided single-wafer tool, which cleans both front and backsides of substrates.
"Low consumables consumption, short treatment times and single-wafer processing offers customers many advantages over conventional cleaning technologies with an extremely low cost of ownership," said Kurt Lackenbucher, senior vice president and chief marketing officer of SEZ. "We believe our spin-processing technology is a good candidate for future technology developments for production at 0.13 micron and below." He said the single-wafer tool offers a suitable wafer-to-wafer repeatability for cleaning applications and the "203 system" can provide advanced chemistry sequences to reduce time and the amount of consumables used in processing wafers.
