Training Courses | | | IPC-A-610 Trainer (CIT)
The Certified IPC-A-610 Trainer (CIT) courses recognize individuals as qualified trainers in the area of quality assurance of electrical and electronic assemblies and prepares them to deliver Certified IPC-A-610 (CIS) training.
Events Calendar | Mon Oct 07 00:00:00 EDT 2019 - Tue Oct 08 00:00:00 EDT 2019 | ,
PCBA Cleanliness End-of-Project Webinar
A1SD62 A1SD62E A1SD62D A1S61 A1SJ71LP21 A1SJ71BR11 A1SJ71AP21 A1SJ71AR21 A1SJ71AT21B A1SJ72T25B A1SJ71E71N-B2 A1SJ71E71N-B5T A1SJ71PT32-S3 A1SJ71T32-S3 A1SJ71UC24-R2 A1SJ71UC24-R4 A1SJ71UC24-PRF A1SJ71UC24-R2-S2 A1SJ71UC24-R4-S2 A1SD51S
Technical Library | 2019-08-07 22:56:45.0
The requirement to reconsider traditional soldering methods is becoming more relevant as the demand for bottom terminated components (QFN/BTC) increases. Thermal pads under said components are designed to enhance the thermal and electrical performance of the component and ultimately allow the component to run more efficiently. Additionally, low voiding is important in decreasing the current path of the circuit to maximize high speed and RF performances. The demand to develop smaller, more reliable, packages has seen voiding requirements decrease below 15 percent and in some instances, below 10 percent.Earlier work has demonstrated the use of micro-fluxed solder preforms as a mechanism to reduce voiding. The current work builds upon these results to focus on developing an engineered approach to void reduction in leadless components (QFN) through increasing understanding of how processing parameters and a use of custom designed micro-fluxed preforms interact. Leveraging the use of a micro-fluxed solder preform in conjunction with low voiding solder paste, stencil design, and application knowhow are critical factors in determining voiding in QFN packages. The study presented seeks to understand the vectors that can contribute to voiding such as PCB pad finish, reflow profile, reflow atmosphere, via configuration, and ultimately solder design.A collaboration between three companies consisting of solder materials supplier, a power semiconductor supplier, and an electronic assembly manufacturer worked together for an in-depth study into the effectiveness of solder preforms at reducing voiding under some of the most prevalent bottom terminated components packages. The effects of factors such as thermal pad size, finish on PCB, preform types, stencil design, reflow profile and atmosphere, have been evaluated using lead-free SAC305 low voiding solder paste and micro-fluxed preforms. Design and manufacturing rules developed from this work will be discussed.
Industry News | 2016-09-11 12:17:53.0
KYZEN is pleased to announce that Dr. Mike Bixenman will present the recent paper “BTC/QFN Test Board Design Considerations and Method for Qualifying Soldering Materials and Cleaning Processes” at SMTA International. The paper is co-authored by Mark McMeen and Jason Tynes from STI Electronics, and will be presented during the Manufacturing Excellence Track during Session MFX7 - Cleaning: New Techniques, on Thursday, September 29, 2016 at 9 a.m.
Industry News | 2017-01-17 15:39:40.0
STI Electronics today announced that it has been selected to receive the “Best of Conference” award for a paper presented during SMTA International in September. The paper entitled “BTC/QFN Test Board Design Considerations and Method for Qualifying Soldering Materials and Cleaning Processes” was co-authored by Dr. Mike Bixenman of KYZEN, and Mark McMeen and Jason Tynes from STI Electronics.
Industry News | 2017-01-17 16:35:22.0
KYZEN is pleased to announce that one of Dr. Mike Bixenman’s papers that was presented during SMTA International 2016 has been selected by the SMTA for a Best Paper Award. Dr. Bixenman won the Rich Freiberger Best of Conference Award for his presentation entitled “BTC/QFN Test Board Design Considerations and Method for Qualifying Soldering Materials and Cleaning Processes.” Bixenman co-authored the paper with Mark McMeen and Jason Tynes from STI Electronics.
Industry News | 2020-08-22 04:19:37.0
The Assembly Division of MacDermid Alpha Electronics Solutions will be presenting two technical papers; "Methods of Reducing or Eliminating Voids in BGA and BTC Devices" and "Can Low Cost Silver Free Alloys Be Used in Type II and III Assemblies?" at the SMTA China South Technical Conference taking place from August 26-27 in Shenzhen, China.
Industry News | 2014-05-14 17:04:17.0
ACD today announced that it has begun accepting BitCoins (BTC) for payment.
Technical Library | 2018-05-23 12:12:43.0
Driven by miniaturization, cost reduction and tighter requirements for electrical and thermal performance, the use of lead-frame based bottom-termination components (LF-BTC) as small-outline no-leads (SON), quad-flat no leads (QFN) packages etc., is increasing. However, a major distractor for the use of such packages in high-reliability applications has been the lack of a visible solder (toe) fillet on the edge surface of the pins: because the post-package assembly singulation process typically leaves bare copper leadframe at the singulation edge, which is not protected against oxidation and thus does not easily solder-wet, a solder fillet (toe fillet) does not generally develop.
