Technical Library | 2008-11-06 02:17:59.0
For many years Acoustic Micro Imaging (AMI) techniques have been utilized to evaluate the quality of the underfill used to support the solder bump interconnections of Flip Chip type devices. AMI has been established as one of the few techniques that can provide reliability and quality control data, but little has been done to automate the evaluation process for Flip Chip underfill until now.
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The exclusive supplier of SIPAD Solid Solder Deposit in North America and the only SIPAD Solid Solder Deposit (SSD) coating service bureau in the world.
Events Calendar | Wed Aug 16 00:00:00 EDT 2017 - Sat Aug 19 00:00:00 EDT 2017 | Harbin, China
ICEPT 2017, The 18th International Conference on Electronic Packaging Technology
Technical Library | 2016-08-11 15:49:59.0
The challenge for 3D IC assembly is how to manage warpage and thin wafer handling in order to achieve a high assembly yield and to ensure that the final structure can pass the specified reliability requirements. Our test vehicles have micro-bumped die having pitches ranging from 60um down to 30um. The high density of pads and the large die size, make it extremely challenging to ensure that all of the micro-bump interconnects are attached to a thin Si-interposer. In addition, the low standoff between the die and interposer make it difficult to underfill. A likely approach is to first attach the die to the interposer and then the die/interposer sub-assembly to the substrate. In this scenario, the die/interposer sub-assembly is comparable to a monolithic silicon die that can be flip chip attached to the substrate. In this paper, we will discuss various assembly options and the challenges posed by each. In this investigation, we will propose the best method to do 2.5D assembly in an OSAT(Outsourced Assembly and Test) facility.
Industry News | 2019-08-19 15:02:03.0
YINCAE has successfully developed a new No Clean Flux product -NC 256 with zero flux residue, excellent soldering wetting and eliminates the cleaning process. NC 256 has been designed not only for wafer ball bumping and other ball bumping such as CSP, BGA, Flip chip and PoP (package on package), particularly for lead free applications, but also for flip chip, CSP, BGA and other advanced components attachment to eliminate cleaning process.
Industry News | 2022-12-26 11:34:19.0
ZESTRON is pleased to announce that ZESTRON's Senior Application Engineer, Ravi Parthasarathy will be presenting, "Process Considerations for Defluxing Ultra-Fine Pitch Die on CoWs", at IPC APEX 2023 taking place in San Diego, California.
Industry News | 2016-10-09 21:32:22.0
Topic: Study on a Formulated No Clean Flux for Fine-Pitch Flip Chip Package of Copper Pillar/ Micro-bump Interconnect. Time: October 18, 10:00 am – 1:30 pm Authors: Hsiang-Chuan Chen, Ya-Ching Chuang, Chia-Hao Chang, Watson Tseng
Industry News | 2017-01-24 10:55:12.0
BP 256 is YINCAE’s new ball attach adhesive product
Advanced semiconductor packaging and high precision SMT assembly convergence. Galaxy unites advanced semiconductor packaging and high precision next-generation SMT assembly on the same platform. This level of convergence delivers the advanced techno
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