Electronics Forum | Wed Oct 18 16:41:35 EDT 2000 | Dave F
It's unrealistic to think that two materials with the following disperant properties would have the same reflow profile. From http://www.norplex.com/Carrier.htm Physical Properties / NEMA FR-4 / NEMA CEM-1 Glass transition temperature �C / 130 / 10
Electronics Forum | Fri Apr 14 13:30:20 EDT 2000 | Murad Kurwa
Hi All: Can you tell me specifically if you converted an exiting product made with Clean process using WS609 or compatible to 'No-Clean' process. We have to convert assemblies from current clean process at a CEM to No-Clean process in our own factor
Electronics Forum | Wed Apr 28 14:32:36 EDT 1999 | JohnW
| | | Thank for the input. But I guess I was looking for more. We have been transferring boards for some time and a have good working relationship with our primary CEM and have worked out many bugs. I was thinking more on the order and don't shoot
Electronics Forum | Sat Aug 22 00:23:10 EDT 1998 | Arul Vanan
We are using PCBs of CEM3 Material with bare copper fiducials. The whole board is of bare copper with a lacquer coating (Coats brother S2974). The fiducials are of 1 mm diameter bare copper. we use Panasert MV2F as well as Fuji CP4-3. In both the m
Electronics Forum | Thu Sep 10 09:21:27 EDT 1998 | Y.F. Michael Kou
| We are using PCBs of CEM3 Material with bare copper fiducials. The whole | board is of bare copper with a lacquer coating (Coats brother S2974). | The fiducials are of 1 mm diameter bare copper. we use Panasert MV2F as | well as Fuji CP4-3. In bo
Electronics Forum | Sat Aug 22 00:11:49 EDT 1998 | Arul vanan
We are using PCBs of CEM3 Material with bare copper fiducials. The whole board is of bare copper with a lacquer coating (Coats brother S2974). The fiducials are of 1 mm diameter bare copper. we use Panasert MV2F as well as FUji CP4-3. In both the mac
Electronics Forum | Fri Nov 09 20:33:28 EST 2001 | caldon
There is two directions I see here...1) you are looking for a bid comaprison or 2) you are going to build boards with the machines you cause they are not being used in full capasity. Some OEMs and/or CEMs charge extra for "cut tape" (Not full reel)c
Electronics Forum | Fri May 10 14:02:05 EDT 2002 | pjc
First off what bone-head designer put them there in the first place. Vias in solder lands is a big time no no. I had this problem at a CEM I worked at. I had the customer change the design but had to run the 6 samples they supplied. I ended up fillin
Electronics Forum | Wed Sep 18 22:53:24 EDT 2002 | davef
Please give us background on your situation, so that we can focus on the specifics, for instance: * This is a bare board problem, correct? Then, this contamination causes what the problems in your process? * What is the type [ie, FR4, CEM1, etc] of
Electronics Forum | Fri Sep 27 17:42:35 EDT 2002 | russ
i don't know of any "handy dandy" but something I use is tape width minus 4mm for the max component size that can be fit into tape widths of up to 32mm. 32mm and larger have holes on both sides which would then be tape width minus 7mm. I have never
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