Full Site - : chip orientation (Page 13 of 18)

bulk feeding chips

Electronics Forum | Wed Feb 26 17:05:42 EST 2003 | davef

Q1: Are the markings on resistors the actual value? A1: Generally, resistor marking indicates the value of the device, where the first two digits are the value and the third digit is the multiplier. Q2: Do AOI machines look for these markings or do

component to scored edge clearance

Electronics Forum | Mon Jun 20 09:12:55 EDT 2005 | davef

There's no easy answer. It depends on: * Thickness and size of the PCB in the array. * Means of separation. * Type of component. SMT components are more sensitive to the forces that need to be applied to separate the PCB. * Type SMT device. Ceram

cap size and copper thickness vs part size questions

Electronics Forum | Mon Nov 07 16:31:47 EST 2005 | CW

hi Bob, Thanks for the info. I understand your comments, but I am looking for specific guidance, If I am putting chip capacitors on a .063 FR4 board, what size package should we stay away from to avoid cracking? (I realize this is dependent on h

Re: Need Wave Solder Help (SMT)

Electronics Forum | Wed May 26 14:24:13 EDT 1999 | Boca

| | we have just started wave soldering passive SMT components and through hole. We are having trouble with voids on the SMT components. It is very random, but effects a lot of TSOT's. We are using an electrovert with a chip wave. Are there any o

Problems with SN100C in a Soltec Delta C Wave

Electronics Forum | Tue Jun 13 09:14:37 EDT 2006 | samir

As I mentioned in another thread, I've always been one to flux the living crap out of a board until the ICT guys start yelling at me, which actually did happen last week. I had a little oriental guy (an immigrant to Riyadh from Vietnam), clicking an

Re: double sided boards - process / design issue.

Electronics Forum | Tue Sep 22 13:14:27 EDT 1998 | Chrys

| We are getting into a lot of double sided boards offlate. Our customer is loading a lot of RNETS, Diodes ( MINLS, SOT23s and other 2 leaded diodes ). We are processing it through a traditional glue process and wave soldering the SMT parts along wit

Non-wetting: PTH on double-side reflow

Electronics Forum | Wed Apr 06 11:10:47 EDT 2005 | smt_rookie

We process a double-side reflow board (10 ups). Chips and IC's on the bottom side while chips, IC's plus thru-hole connectors and IC sockets on top side (bottom side first then top side reflow). In the past, we were not encountering any soldering pro

Re: Component Packaging Trends

Electronics Forum | Thu Oct 15 17:14:50 EDT 1998 | Justin Medernach

| Hi Folks, | As I travel our industry it seems to me the trend is to move from finner and finner pitch QFP's to array packages (BGA's, CSP's, etc.). Do you folks see the same trend? What is the finest pitch QFP package you have used in your process?

cap size and copper thickness vs part size questions

Electronics Forum | Tue Nov 08 05:00:23 EST 2005 | rlackey

Hi CW, Regarding orientation, yes, your diagram is right - see the following link for confirmation. http://search.murata.co.jp/Ceramy/image/img/A18X/C2EB3C.PDF Regarding information on bending strength you want to talk to your local Murata office

Re: Component Packaging Trends

Electronics Forum | Fri Oct 16 16:11:52 EDT 1998 | Joe Belmonte

| | Hi Folks, | | As I travel our industry it seems to me the trend is to move from finner and finner pitch QFP's to array packages (BGA's, CSP's, etc.). Do you folks see the same trend? What is the finest pitch QFP package you have used in your proc


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