Electronics Forum | Thu Jun 29 12:07:09 EDT 2017 | georgetruitt
HOW THICK IS THE BOARD? IS THERE A LOT OF COPPER IN THE BOARD? DOES YOUR CUSTOMERS PROVIDE HEAT RELIEF IN THE BOARDS BARREL DESIGN THERE NEEDS TO BE PLENTY OF ROOM FOR LEADFREE SOLDER TO FLOW, DID YOU CHECK YOUR PIN(LEAD)TO HOLE (BARREL) RATIO? N
Electronics Forum | Fri Feb 22 14:22:07 EST 2008 | stevek
Are you using nocleans, especially when you get to SMT? Years ago, I had OA wave flux get into vias that were plugged from the top under parts. It is really difficult to clean small, high aspect ratio vias. Cross sections showed that the copper in
Electronics Forum | Fri Aug 18 10:55:31 EDT 2006 | Chunks
Steve, You almost got yout Man Card revoked for stating: "determining the risks associated with simultaneously applying compressive and rotational forces to the end of the barrel". Luckily you bounced back with "chewing up the copper". Just pokin
Electronics Forum | Tue Apr 28 07:22:46 EDT 2020 | stephendo
Are you watching for copper dissolution? At one place I was asked to check why we had no barrels with some PTH locations. It was being dissolved in the solder fountain during rework.
Electronics Forum | Mon Apr 02 20:47:22 EDT 2001 | davef
Cuppla questions for ya ... Where are the shorts [above the mask or between the mask and the laminate]? On the board, what material is between the copper traces and the mask? What type of solder mask(s) used by your suppliers? What are they using
Electronics Forum | Mon Mar 07 20:27:07 EST 2005 | KEN
Oh silver and its...improved solderability over tin / copper. BS if you ask me. Look to your flux and thermal profile for wetting spread. Ask yourself just how much "wetting spread" do you need to fill a barrel? I have the same 100% barrel fill
Electronics Forum | Sat Nov 08 09:10:16 EST 2008 | davef
SN100 was designed for selective soldering and producing low levels of voiding. But thin barrel plating is a common cause of voids in wave and selective soldered connections, as you say. As a result, you checked the plating thickness and it was accep
Electronics Forum | Tue Mar 28 08:29:04 EST 2006 | davef
Pad design - Standard IPC 20 pitch QFP Thermal pad design - Layout the thermal pad 0mm to 0.15mm larger per side (0mm to 0.30mm larger overall) than the exposed die pad on the package. �Larger than�, as opposed to the same size, is preferred. Obvio
Electronics Forum | Thu Jun 03 20:09:56 EDT 1999 | C.K.
I'm encountering a new problem at my new company that I haven't encountered before in my past life - and that's Wave Soldering VIA holes. We've been getting a rash of defects that we call in this company, "insufficient solder in VIA hole." These def
Electronics Forum | Fri Jun 04 11:30:40 EDT 1999 | Earl Moon
| I'm encountering a new problem at my new company that I haven't encountered before in my past life - and that's Wave Soldering VIA holes. | | We've been getting a rash of defects that we call in this company, "insufficient solder in VIA hole." The
