Full Site - : copper electroplating (Page 4 of 8)

Re: PCB Standards

Electronics Forum | Wed Jun 10 18:40:00 EDT 1998 | Earl Moon

| I am looking for the Industry standards on vias. Are they required to be plated with solder or is copper plating enough? What about reliabilty with either one? Also, if tenting the via is required should it be copper plated or solder plated over

Pure Tin Quandry

Electronics Forum | Tue Jun 07 21:50:46 EDT 2005 | davef

Most component fabricators don't properly understand the impact of soldering with pure tin solderability protection on components. Here's one that does: "The Effects of Board Attachment Processing on Sn Whisker Formation on Electroplated Matte-Sn on

Re: Pin Hole/Blow Hole - Causes and cure please

Electronics Forum | Thu Jun 24 10:48:02 EDT 1999 | Earl Moon

| Recently, there has been an upsurge in the Pin Hole/Blow Hole problem in our wave soldering process. We are baking the PCBs for 2 Hrs. at 125 degree C. The Wave Soldering profile seems to be O.K. Still the problem is persistent. Can somebody hel

Re: Black hole process (MacDermitt) for PCB fab

Electronics Forum | Tue May 30 21:09:30 EDT 2000 | Dave F

Dennis: Direct metalization is more of an European phenomena than a US one. Not to say that good things don�t come out of Europe. As background: Direct Metallization. In circuit board fabrication, an alternative to electroless plating makes the

OSP vs HASL

Electronics Forum | Mon May 14 17:12:20 EDT 2001 | davef

Continuing along the path that Brian took ... IPC-7525 gives design guideline for stepped stencils. It goes something like: * Stepped area SB GT 25 thou from pads located on the greatest thickness of the stencil * Pads in stepped area SB GT 35 tho

Re: Assembly of CSP on pads with vias.

Electronics Forum | Sat Jan 23 13:29:40 EST 1999 | Earl Moon

| Hi Everyone, | We plan to build, for reliability/experimental/research purpose some CSPs (namely Tessera microBGA 46-I/O 0/75mm pitch and TI 64 I/O 0/8 mm pitch). the various factors that we plan to evaluate are the reliability and assembly concern

Re: Good Solder Joint Failures

Electronics Forum | Mon Feb 15 17:57:01 EST 1999 | Earl Moon

| Hope some of you out there can help me with this one. | I am getting feedback from our test department that they are showing opens on solder joints which have visually good wetting. The touch-up operators confirm that the joint looks good. All they

Re: Electroless Tin Plating

Electronics Forum | Fri Aug 20 12:18:11 EDT 1999 | Earl Moon

| I am being asked, by my vendor and Purchasing people about converting from Tin/lead pads on P.C.B's to Electroless Tin Plating. | Can any one tell me what I have to change in my SMT | process (paste, reflow, etc) If any? | I ran one P.C.Boar

Re: Electroless Tin Plating

Electronics Forum | Fri Aug 20 12:54:11 EDT 1999 | Carol Zhang

| | I am being asked, by my vendor and Purchasing people about converting from Tin/lead pads on P.C.B's to Electroless Tin Plating. | | Can any one tell me what I have to change in my SMT | | process (paste, reflow, etc) If any? | | I ran one

Re: Electroless Tin Plating

Electronics Forum | Fri Aug 20 14:22:02 EDT 1999 | Earl Moon

| | | I am being asked, by my vendor and Purchasing people about converting from Tin/lead pads on P.C.B's to Electroless Tin Plating. | | | Can any one tell me what I have to change in my SMT | | | process (paste, reflow, etc) If any? | | | I


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