Technical Library | 2023-04-17 17:05:47.0
In an ideal world, manufacturing devices would work all of the time, however, every company receives customer returns for a variety of reasons. If these returned parts contributed to a fail, most companies will perform failure analysis (FA) on the returned parts to determine the root cause of the failure. Failure can occur for a multitude of reasons, for example: wear out, fatigue, design issues, manufacturing flaw or defect. This information is then used to improve the overall quality of the product and prevent reoccurrence. If no defect is found, it is possible that in fact the product has no defect. On the other hand, the defect could be elusive and the FA techniques insufficient to detect said deficiency. No-clean flux residues can cause intermittent or elusive, hard to find defects. In an attempt to understand the effects of no-clean flux residues from the secondary soldering and cleaning processes, a matrix of varying process and cleaning operation was investigated. Of special interest, traveling flux residues and entrapped residues were examined, as well as localized and batch cleaning processes. Various techniques were employed to test the remaining residues in order to assess their propensity to cause a latent failure. These techniques include Surface Insulation Resistance1 (SIR) testing at 40⁰C/90% RH, 5 VDC bias along with C32 testing and Ion Exchange Chromatography (IC). These techniques facilitate the assessment of the capillary effect the tight spacing these component structures have when flux residues are present. It is expected that dendritic shorting and measurable current leakage will occur, indicating a failing SIR test. However, since the residue resides under the discrete components, there will be no visual evidence of dendritic growth or metal migration.
Industry News | 2023-05-30 07:03:16.0
Gen3 is excited to announce the launch of the latest addition to "The Printed Circuit Assembler's Guide to...™" eBook series in collaboration with i-Connect007.
Industry News | 2023-08-21 12:19:15.0
Gen3, a global leader in SIR (Surface Insulation Resistance), CAF (Conductive Anodic Filament), solderability, ionic contamination, and process optimization equipment, along with Zestron, renowned experts in cleaning and reliability solutions, are thrilled to announce an enlightening workshop focused on Electronics Manufacturing Processes: Where Quality Assurance Meets Surface Reliability. This informative seminar is scheduled to take place on Wednesday, September 6, 2023, at the Manufacturing Technology Centre in Ansty Park, Coventry.
Industry News | 2023-09-04 13:56:51.0
Gen3, Global leader in SIR, CAF, Solderability, Ionic Contamination & process optimisation equipment, announced its participation at productronica India, the International Trade Fair for Electronics Development and Production, taking place from Sept. 13-15, 2023, at the Bangalore International Exhibition Centre (BIEC) in Bengaluru, India on booth number PE 51 in Hall 4.
Technical Library | 2020-09-23 21:37:25.0
The need to minimise thermal damage to components and laminates, to reduce warpage-induced defects to BGA packages, and to save energy, is driving the electronics industry towards lower process temperatures. For soldering processes the only way that temperatures can be substantially reduced is by using solders with lower melting points. Because of constraints of toxicity, cost and performance, the number of alloys that can be used for electronics assembly is limited and the best prospects appear to be those based around the eutectic in the Bi-Sn system, which has a melting point of about 139°C. Experience so far indicates that such Bi-Sn alloys do not have the mechanical properties and microstructural stability necessary to deliver the reliability required for the mounting of BGA packages. Options for improving mechanical properties with alloying additions that do not also push the process temperature back over 200°C are limited. An alternative approach that maintains a low process temperature is to form a hybrid joint with a conventional solder ball reflowed with a Bi-Sn alloy paste. During reflow there is mixing of the ball and paste alloys but it has been found that to achieve the best reliability a proportion of the ball alloy has to be retained in the joint, particular in the part of the joint that is subjected to maximum shear stress in service, which is usually the area near the component side. The challenge is then to find a reproducible method for controlling the fraction of the joint thickness that remains as the original solder ball alloy. Empirical evidence indicates that for a particular combination of ball and paste alloys and reflow temperature the extent to which the ball alloy is consumed by mixing with the paste alloy is dependent on the volume of paste deposited on the pad. If this promising method of achieving lower process temperatures is to be implemented in mass production without compromising reliability it would be necessary to have a method of ensuring the optimum proportion of ball alloy left in the joint after reflow can be consistently maintained. In this paper the author explains how the volume of low melting point alloy paste that delivers the optimum proportion of retained ball alloy for a particular reflow temperature can be determined by reference to the phase diagrams of the ball and paste alloys. The example presented is based on the equilibrium phase diagram of the binary Bi-Sn system but the method could be applied to any combination of ball and paste alloys for which at least a partial phase diagram is available or could be easily determined.
Industry News | 2014-02-03 11:43:28.0
Constant R&D and ongoing product development will be evident in the advanced technologies and functionalities showcased by Hitachi High Technologies America at IPC/APEX 2014, according to Tom Simpson, General Manager of the U.S. operation. "Our new Sigma G5S is faster, more capable and offers double the accuracy of our flagship G5 modular mounter."
Industry News | 2003-10-30 11:15:04.0
TeligentEMS, a provider of electronic manufacturing services for complex, high mix, low to medium volume assemblies, is pleased to announce that it has received registration to ISO 9001:2000.
Industry News | 2009-03-16 17:26:28.0
WESTMORELAND, N.H. � March 2009 � The leader in harsh environmental labels and product marking for industrial identification, Polyonics Inc. announces Dr. Jim Williams, Chairman and Founder of Polyonics, will hold a forum titled, �Counterfeit Electronics� at the upcoming APEX Conference and Exhibition. Dr. Williams will be the moderator, and the forum is scheduled to take place on Wednesday, April 1, from 10:15-11:45 a.m.
Industry News | 2009-09-15 02:58:35.0
Koczera Consulting LLC, a closely-held consultancy, has been formed.
Industry News | 2010-06-25 11:24:57.0
Semiconductor sales are expected to soar 28.4% this year, as the industry works its way out of a difficult year, according to a mid-year report from the closely watched Semiconductor Industry Association (SIA) that was released Thursday.
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