Electronics Forum | Thu Feb 17 21:42:12 EST 2000 | Dave F
Hey Bud: Moved from that Bi-crap to something serious, eh? Several things: 1 Get in touch with Doug Romm (drom@msg.ti.com) at Texas Instruments. He talks palladium. 2 Review the archives on Palladium. 3 I think you're running light on temps. Eut
Electronics Forum | Thu Feb 17 21:42:12 EST 2000 | Dave F
Hey Bud: Moved from that Bi-crap to something serious, eh? Several things: 1 Get in touch with Doug Romm (drom@msg.ti.com) at Texas Instruments. He talks palladium. 2 Review the archives on Palladium. 3 I think you're running light on temps. Eut
Electronics Forum | Thu Nov 07 12:35:38 EST 2002 | slthomas
Sounds like you're talking about the "heel" of the lead not being soldered, in other words, no heel fillet, which IS necessary. That problem, for us, was attributed primarily to poor layout (insufficient length of pad extension to provide room for
Electronics Forum | Wed Nov 06 16:31:59 EST 2002 | slthomas
I would also consider paste control (don't take it personally...I always have to get after people about this one), time on the stencil, time between print and reflow, solderability of the component leads, paste volume (that one really got us once....
Electronics Forum | Wed Nov 06 19:03:33 EST 2002 | broncos
If you are certain that reflow process is good, I would suggest starting checking the following: 1. Check to see if leads / pads are contaminated or oxidized. However, this usually results poor solder quality throughout the board. 2. Check the amou
Electronics Forum | Thu Nov 07 09:56:26 EST 2002 | bpan
Thanks for the ideas guys. My QC inspector can take a pick and move the back part of the lead....even though the front of the lead is soldered enough to hold. There is SOME NOT ALL areas where there is no solder on the curved portion of the lead.The
Electronics Forum | Wed Nov 06 15:47:49 EST 2002 | bpan
Hello All, Having a problem during reflow and would like your opinions. We are using Kester r562 water soluble paste and I am using a Kic 2000 profiler in a 4 zone oven (top only). We are seeing poor wetting or fillets that are not "passable" per IPC
Electronics Forum | Tue Jul 01 22:20:26 EDT 2008 | davef
Fillet Height [F]. Wetting is evident on the vertical surface of the termination as the minimum fillet height.
Electronics Forum | Thu Jan 08 13:47:13 EST 2004 | guest
It is my understanding that per IPC specs toe fillets are not required as they do not add any strength to a solder connection. Our thoughts were allways that proper toe fillets are a sign of a good process. What are some of your guidelines and though
Electronics Forum | Fri Jul 19 01:58:30 EDT 2019 | dhanish
May I know what is the requirement for side fillet for QFN?Any information from IPC spec on QFN side fillet?We cant make the solder joint form at the side fillet.
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