Industry News | 2010-10-11 15:02:22.0
Lattice Semiconductor Corporation today announced the availability of GNU software development tools for its LatticeMico8™ soft processor.
Industry News | 2010-10-12 12:46:08.0
Lattice Semiconductor Corporation today announced the immediate availability of Service Pack 1 for Version 8.1 of its ispLEVER® FPGA design tool suite.
Industry News | 2008-08-22 18:11:13.0
San Jose, Calif. and Wilsonville, Ore., August 19, 2008�Supporting the growing number of avionics and military applications requiring DO-254-certifiable components, a Corporation (NASDAQ: ALTR) and Mentor Graphics Corporation (NASDAQ: MENT) today announced the companies are working together to develop tools and methodologies for use in creating DO-254-certifiable intellectual property (IP) that targets a's field programmable gate array (FPGA) and HardCopy� application specific integrated circuit (ASIC) solutions. As part of this announcement, Mentor will join a's DO-254 Global Partner Network in order to establish design and verification best practices for DO 254-certifiable IP development and integration flows.
Overview The DF6811 is a advanced 8-bit MCU IP Core with highly sophisticated, on chip peripheral capabilities. DF6811 soft core is binary-compatible with the industry standard 68HC11 8-bit microcontroller and can achieve a performance 45-100 milli
Overview The D16550 is a soft Core of a Universal Asynchronous Receiver/Transmitter (UART) functionally identical to the TL16C550A. The D16550 allows serial transmission in two modes: UART mode and FIFO mode. In FIFO mode internal FIFOs are act
Overview The DSPI_FIFO is a fully configurable SPI master/slave device, which allows user to configure polarity and phase of serial clock signal SCK. It allows the microcontroller to communicate with serial peripheral devices. It is also capable of
Overview The DSPIS is a fully configurable SPI ma slave device, designated to operate with passive devices like memories, LCD drivers etc. The DSPIS allows user to configure polarity and phase of serial clock signal SCK. A serial clock line (SCK) s
Overview The D8255 is a programmable I/O device which is designed for use with all Intel and most other microprocessors. It provides 24 I/O pins which may be indi-vidually programmed in 2 groups of 12 and used in 3 major modes of operation: Mode 0
Industry News | 2010-07-20 14:01:05.0
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that it has released more than 90 reference designs optimized for the MachXO™ and ispMACH® 4000ZE PLDs. Reference designs enable the quick and efficient design and deployment of commonly used functions such as general purpose I/O expander, I2C bus master / slave, LCD controller and SD Flash controller, as well as other interfaces, in a variety of markets including consumer, communications, computing, industrial and medical.
Industry News | 2010-10-30 02:18:28.0
Lattice Semiconductor Corporation announced its new PAC-Designer® design software version 6.0, which enables analog and board designers to integrate a circuit board’s power management and digital board management functions into the newly announced Platform Manager™ device family.
