Electronics Forum | Thu Mar 23 22:26:53 EST 2006 | Joseph
Dear all, Referring comment from Mr. Jack,IPC director certification & assembly technology, the term "fillet tearing" is too broad. Cracks or fractures in the required fillet area, with SnPb or LF alloy and whether you call it tearing or not, is a D
Electronics Forum | Tue May 06 15:33:36 EDT 2008 | operator
I know IPC-A-610 RevD has requirements for Gold Fingers and solder contamination. Is there any such requirements for Gold Mounting Holes, Gold Pressure Fit Socket Lands (SMT pads), Exposed Gold Traces ? Wouldn't these all be considered "critical cont
Electronics Forum | Thu Nov 21 08:20:32 EST 2019 | scotceltic
Ok, Question for all of you quality inspectors out there. Would you consider the IC image here to have excessive voiding given the amount of vias ? I only see an IPC voiding spec on BGA balls but nothing for IC's. I'd appreciate all your thoughts
Electronics Forum | Sat Mar 06 17:45:29 EST 2010 | isd_jwendell
Unfortunately, what you are calling a good fillet is not a good fillet. Solder on the top of the IC lead does not help to make a good connection. The most important fillet is the one located at the heel (think of the IC lead where it meets the PCB as
Electronics Forum | Mon Oct 12 15:51:47 EDT 2015 | davef
IPC-A-610E-2010, Acceptability of Electronic Assemblies, 8.3.4 Castellated Terminations talks to the acceptability of solder connections on components like yours. It’s tough to say from the pictures, but I’d say your issues are: Missing solder: Plat
Electronics Forum | Tue Dec 04 08:34:07 EST 2007 | davef
We no advice to give you on the topic, but maybe while you're waiting for others to reply, reading a trade journal article on the topic might help. Below is a link to "Pin-in-hole reflow (PIHR) and lead-free solder joints" by David Bernard, Bob Willi
Electronics Forum | Tue May 02 14:56:57 EDT 2006 | Tim
8.2.5.5 Flat Ribbon, L, and Gull Wing Leads, Maximum Heel Fillet Height (E). For class 3 the heel fillet cannot touch the body of a plastic component, except for SOICs and SOTs. Why is my question? What type of failure will be the result of solder
Electronics Forum | Thu Apr 05 09:18:14 EDT 2007 | pjc
Please note that pin holes and blow holes are not always defects. The latest IPC 610A Rev D workmanship standard has them as process indicators- depending on Class. I don't have the document handly while writing this. It would be good to look that up
Electronics Forum | Thu Dec 06 19:46:08 EST 2001 | davef
First, we�re assuming that we�re talking hot air solder leveled [HASL] bare boards, eh? Consider using A-600 - Acceptability of Printed Boards as the basis for discussing the bare board problems. It is the bare board analog of A-610 - Acceptability
Electronics Forum | Fri Feb 17 13:10:34 EST 2006 | amol_kane
I have Immersion Ag and Immersion Sn LF boards that were waved using SAC305 alloy. I have a lot of tears/shrink voids in the waved connections. I am aware that SAC305 in wave has a propensity of shrink tears/voids due to the non eutectic property of
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