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PIHR Inspection Criteria

Electronics Forum | Thu May 17 07:36:40 EDT 2001 | Bob Willis

Here is a copy of a draft document on PIHR Inspection I have jotted down on a flight to Scotland yesterday, any comments suggestions etc ? I have already most of the photos for the standard but as you know there is nothing in the IPC document it just

RoHS Issues

Electronics Forum | Thu Apr 19 08:50:38 EDT 2007 | rgduval

Welcome to RoHS. Or, at least, to the version of RoHS that I've had to deal with since I started with my current company. Blowholes and pinholes seem to be common in PB-free manufacturing. At least, they have for me here. I also note that IPC has

Hot Tear/Shirnk Hole>Will it happen on BGA joint ??

Electronics Forum | Wed Aug 06 08:09:57 EDT 2008 | davef

We agree that the squigglie part of the section of the BGA ball looks like something other than 'hot tear.' We'd guess that it is an inclusion, but it could be a sectioning defect, as you say. We agree that the majority of occurances of hot tear are

Re: little green men

Electronics Forum | Sat Jul 17 13:25:02 EDT 1999 | Scott

| | | | | | I need a good chemical to remove the lacquer finish off of magnet wire. I know there are different kinds but I need one that really works. Any suggestions would be great. thanks in advance guys. | | | | | | | | | | | What is it you're tr

Re: CSP Assembly- SIR Test

Electronics Forum | Thu Dec 31 01:09:18 EST 1998 | Kelvin Chow

Dear Micheal, SIR test is used to characterize fluxes by determining the degration of electrical insulation resistance of rigid printed wiring board specimens after exposure to the specified flux. (IPC TM-650 #2.6.3.3 http://www.ipc.org/html/tm2.6.h

Re: CSP Assembly- SIR Test

Electronics Forum | Thu Dec 31 14:20:35 EST 1998 | Michael Allen

Kelvin, Yes, we're referencing the same spec. I performed the test under the Class 2 conditions (except that I used a 100V bias rather than 50V...but my water-washed microBGAs still passed). Regarding the omegameter test: we have this instrument,

OSP vs HASL

Electronics Forum | Mon May 14 17:12:20 EDT 2001 | davef

Continuing along the path that Brian took ... IPC-7525 gives design guideline for stepped stencils. It goes something like: * Stepped area SB GT 25 thou from pads located on the greatest thickness of the stencil * Pads in stepped area SB GT 35 tho

BGA Placement Process

Electronics Forum | Fri Mar 26 09:00:19 EDT 2010 | krish_bala

Thank you Graham for the response. The particular BGA that we currently Bake is a Level 3 BGA, which means the BGA will expire in 7 days after removal. We are currently baking the BGAs once a week for the problem described above. These devices are u

Re: Thanks.

Electronics Forum | Mon Jun 07 11:10:56 EDT 1999 | Brian Wycoff

| | | | | | | Geez, those test guys are always whining about via holes, aren't they? I even had one test guy go over to our finals/add-on department and instruct everone to look for unfilled vias and fill them by hand! Without consulting the area

Use lead-free alloy wire during rework for Leaded Process

Electronics Forum | Wed Nov 01 07:32:33 EST 2006 | davef

What you have run up against is the unfortunate consequence of the transition period from Sn-Pb to Pb-free. In the past 2-3 years there have been several studies highlighting the differences in reliability between mixed metal systems, Sn/Pb, and SAC


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