Electronics Forum | Thu Sep 27 10:40:46 EDT 2007 | rgduval
Joris, Yep, very common to have those small blow holes in lead-free alloys. We used to get them very consistently on white-tin finished boards, and less frequently with gold finished boards, for what ever that is worth. IPC-610 actually allows t
Electronics Forum | Sun Feb 28 13:51:56 EST 2021 | bengill
We have a unique connector with flat leads, i.e. the leads leave the connector body flat parallel to the pads. The leads are without a heel, they are flush with the connector body. Moreover, one can't solder beneath the connector because the leads ar
Electronics Forum | Wed Apr 09 09:36:18 EDT 2003 | iman
what r your test running parameters? what end-application?
Electronics Forum | Wed Dec 01 15:56:53 EST 2004 | fescsteve
Frontier Electronic Systems Corp. Stillwater, OK www.FESCorp.com IPC Class I - III and NASA Space qualified Quick turn-arounds to moderate volume. Steve
Electronics Forum | Tue Aug 13 09:47:49 EDT 2002 | johnw
Hi Folk's, a quick and easy? question. Got a card with PTH edge stiffeners fitted to it so we need to flow solder them. Having problems getting hole fill, mainly I think due to 2 things, poor pin to hole ratio and also a bit of oxide. The question i
Electronics Forum | Mon Nov 01 17:13:37 EST 1999 | Mark W.
Jason, What is the revision of IPC you are referring too?? IPC 610 rev. b requires 75% fill on classes 2 & 3. Class 2 does allow the exception of 50% fill if the PCB has a Metal Core or Thermal/Heatsink Plane provided that the solder extends 360 de
Electronics Forum | Tue Sep 27 09:43:38 EDT 2011 | dyoungquist
I did not mean to imply building to class III would prevent failures. Since there seemed to be a little confusion about the classes I threw that out to show that class III was a higher standard. I also agree that while re-work can fix a class III d
Electronics Forum | Wed Feb 02 21:56:11 EST 2005 | davef
Based on X-ray imaging, IPC-7095 standard specifies three categories for void size for BGA solder joints. These categories are based on the percentage of joint cross sectional area occupied by the voided area. Class III Small: Void area is LT 9% Cla
Electronics Forum | Thu Jun 24 04:38:31 EDT 1999 | Vinesh Gandhi
Recently, there has been an upsurge in the Pin Hole/Blow Hole problem in our wave soldering process. We are baking the PCBs for 2 Hrs. at 125 degree C. The Wave Soldering profile seems to be O.K. Still the problem is persistent. Can somebody help
Electronics Forum | Fri Dec 07 09:43:04 EST 2001 | Russ Steiner
I have a mixed technology PCB that has SMT all on bottom, TH parts on both sides (Yes, I realize that's bad. Can't be avoided.) We have designed a 10-up panel, 2 x 5 array. There are 50 leads per bd, 500 per panel. How much time is reasonable to a
