Electronics Forum | Sat Jun 05 13:38:22 EDT 2021 | ppcbs
For Linear Tech LGA's we solder bump the LGA using a .30mm solder ball then reflow with a tacky flux. This will provide a void free solder joint and adds a little height to the solder joint in case you use a flux that you want to clean from under th
Electronics Forum | Thu Oct 25 13:35:47 EDT 2012 | davef
Here's a paper that may help http://www.ipcoutlook.org/pdf/assembly_challenges_bottom_terminated_ipc.pdf Temperature Impact * Profile didn’t have a significant impact on voiding. * Voids slightly increased with higher temperature. Reflow Atmosp
Electronics Forum | Fri Sep 03 10:52:39 EDT 2010 | arjan
Mark, Can you send some X-ray foto's of your LGA solderjoints, I am curious about the results of a marginal paste volume in combination with the Multicore LF318. Did you follow the recommandation of LT and use also soldermask defined pads on your bo
Electronics Forum | Mon Oct 05 14:38:03 EDT 2015 | deanm
We are planning on using a chip that is available in LGA or Sn/Pb balled BGA. The package dimensions are the same. Pitch = 1.27mm. We are using a Sn/Pb soldering process and no clean paste (wash afterward) for high reliability Class 3 assemblies. Fai
Electronics Forum | Thu Jan 02 12:42:49 EST 2020 | slthomas
As far as stencil design for LGA's I was thinking in terms of verifying that you've used the same aperture design criteria that you would normally use for LGA's so you know you didn't introduce some new variable. I've made changes from my norm bas
Electronics Forum | Tue Aug 31 04:05:23 EDT 2010 | arjan
Hi Mark, Thanks for your responce! The stencil thickness and especially the reduction of 45% are not recommend by LT, did you came to this combination experimentally? We never have the illusion to produce voiding free, but now its around the accepta
Electronics Forum | Thu May 08 19:52:40 EDT 2014 | hegemon
There are many different style LGA packages, but don't sweat it. Stick with the manufacturers recommendations for PWB pad geometry for a start. Voiding can be reduced by careful profiling, and also by pre-tinning the devices. QFN style packages can b
Electronics Forum | Fri Nov 23 06:34:43 EST 2012 | bandjwet
With all of the various techniques available for LGA rework including but not limited to: Bumping the part using a polyimide stencil http://www.solder.net/products/stencilmate Bumping the part using a metal fixture or http://www.finetech.de/advance
Electronics Forum | Mon Aug 30 10:17:16 EDT 2010 | markgray
We currently use this devise in one of our designs with no issues. We are using a 3mil stencil and a 45% apperature reduction. It is virtually impossible to eliminate voids but they are in an acceptable range. Solder balls are caused on this componen
Electronics Forum | Wed Sep 01 05:29:40 EDT 2010 | arjan
We baked the parts just before assembly. 2>we baked the parts and store them in 4 days in drycab (60degC, Rh0,5%)and finally assembly 3> we baked the parts and refowed them on a leadfree profile and finally the assembly on the boards. The same we als
