Electronics Forum | Mon Feb 26 20:22:01 EST 2001 | davef
As a design rule, provide 0.050" minimum between parts to be "masked" and areas that require wave contact. The more the better is the general rule to apply. Check: http://www.autogroup.com/designguideb/ http://www.spprecision.com/ http://www.datumdy
Electronics Forum | Wed Sep 18 12:31:16 EDT 2002 | dragonslayr
My suggestion is to conduct a Design For Manufacturing (DFM)study on the assembly in question. Pay particular attention to the pad sizes, component lead dimensions and satisfy yourself that those two factors are correct. Given that pads match compone
Electronics Forum | Wed Jul 12 09:45:16 EDT 2000 | Charlie
The following are questions my boss has ask me to send out to you folks. This is done in an effort to see "What does the rest of the world do?" [if such a world could possibly exists, in the first place]. If you would select any or all questions to r
Electronics Forum | Thu Mar 13 15:17:03 EDT 2008 | slthomas
about WHY violating IPC design standards gives you grief? Do they even know they exist? We've got one in particular that seems to shoot from the hip. I want to tell them the "why" as well as the "what" so they'll be a little more proactive. My fee
Electronics Forum | Sat May 06 08:46:46 EDT 2000 | Dave F
Sal: Now you�re talkin�, buddy!!! Darrell is correct. All things being equal, thermal relieved vias (and through holes) should be the hottest spot on the board at reflow temperatures. Vias are gonna take on solder like drippin�s take to biscuits.
Electronics Forum | Wed Feb 23 20:25:17 EST 2000 | Chris Wallace
Like all who post messages here, I'm looking for a little bit (well, maybe a lot of bit) of help. We're currently going through a redesign of a board which will utilize several FPGAs. The manufacturer (Xilinx) recommends using solder mask defined p
Electronics Forum | Wed Feb 23 20:25:17 EST 2000 | Chris Wallace
Like all who post messages here, I'm looking for a little bit (well, maybe a lot of bit) of help. We're currently going through a redesign of a board which will utilize several FPGAs. The manufacturer (Xilinx) recommends using solder mask defined p
Electronics Forum | Tue Aug 30 10:48:18 EDT 2005 | cmiller
If you do not have a lot of TH joints there are some advantages. No boards "submarined" in solder pot on wave. You can solder the bottome side SMT parts rather than epoxy them when the parts are put down. This should reduce SMT defects and missing pa
Electronics Forum | Tue Jan 29 20:14:54 EST 2002 | davef
Please help us understand your situation better by describing the following: * Component [ie, PTH/SMT, type of component, lead finish you expected/ received, etc.] * Board type [ie, type of board FR-4/CEM/ceramic, etc.] * Solderability protection on
Electronics Forum | Tue Jun 15 12:03:27 EDT 1999 | Dave F
| Has anyone had issues where bottomside double reflowed smt has fallen off in the wave when using voc-free flux? I have verified the hotter profile was not the issue by using an alcohol based flux with no problems.This voc-free flux is also not caus
.png)
.gif)
