Electronics Forum | Tue Jan 30 10:44:02 EST 2018 | emeto
If you go even further, the flux residue actually isolates the joints from the surrounding atmosphere, so it is actually supposed to be there. Adding a step in your process that is obsolete, doesn't comply very good with the whole lean concept. I don
Electronics Forum | Thu Feb 01 15:36:42 EST 2018 | davef
Not to be repetitious, I just don't remember if this has been said or not, I'm old, give me a break. Some people have found that DI water is too thick to properly remove flux residue under low stand-off components.
Electronics Forum | Wed Jan 13 12:17:47 EST 2016 | trampacorp
Thanks for your input Michael. Basically the > boards had been go through from washing and even > ionic contamination already. In order to > eliminate or detect the flux residues, is there > any equipment something like a uv lamp that can > dete
Electronics Forum | Sat Mar 27 12:36:34 EST 1999 | Scott Cook
| Hi, | I have a customer who's electronic assemblies produce RF. He is insisting upon aqueuos cleaning. We switched to a no clean solder years ago and no longer have an aqueous system. | Is aqueous cleaning necessary to eliminate 'cross talk' of
Electronics Forum | Wed Oct 06 12:03:12 EDT 1999 | Graham Naisbitt
| | Hi, | | | | Help! Could anyone help to enlighten me on this? | | | | Question: | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a n
Electronics Forum | Fri Oct 08 02:31:07 EDT 1999 | Brian
| | | | Hi, | | | | | | | | Help! Could anyone help to enlighten me on this? | | | | | | | | Question: | | | | | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowab
Electronics Forum | Wed Oct 06 23:36:28 EDT 1999 | karlin
| | | Hi, | | | | | | Help! Could anyone help to enlighten me on this? | | | | | | Question: | | | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z
Electronics Forum | Wed Oct 06 08:41:42 EDT 1999 | Dave F
| | Hi, | | | | Help! Could anyone help to enlighten me on this? | | | | Question: | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a n
Electronics Forum | Wed Oct 06 11:40:41 EDT 1999 | Debbie Alavezos
| | Hi, | | | | Help! Could anyone help to enlighten me on this? | | | | Question: | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a n
Electronics Forum | Wed Oct 06 00:26:04 EDT 1999 | Karlin
| Hi, | | Help! Could anyone help to enlighten me on this? | | Question: | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a normal water cl
