Electronics Forum | Sat Mar 15 00:52:18 EST 2003 | Grant
Hi, We had tomb-stoning on a product, and it was quite severe. We eliminated it by reducing the amount of solder paste on the small passible component pads. We used a 5 thou stencil, with 20% reduction, and it eliminated the problem. Regards, Gra
Electronics Forum | Mon May 27 15:11:25 EDT 2013 | ericrr
Interesting, I could not find anything via a website search some of the links came up as 404, others a "home" page and some never went at all (or took too long) So I turned to google and found http://www.smtinfo.net/docs/tombstoning.pdf a 16 page a
Electronics Forum | Thu Apr 11 20:35:22 EDT 2002 | davef
Messy. Messy. Messy. Consider gluing these components, until you control your process. It is unclear to us that a single factor drives these defects, but multiple factors that need to be tuned to work well together. PAD DIMENSIONS * Some SM-782 pa
Electronics Forum | Mon Feb 18 03:40:04 EST 2008 | akareti
Hi everybody, I found a defect varistor 0603 Tombstone and poor welting when we use component that terminal is Silver palladium (Ag/ Pd) with Leaded solder paste (63/37). Then we change alternative component that terminal is Ni/ Sn the result not fou
Electronics Forum | Wed Apr 09 17:39:30 EDT 2008 | diesel_1t
Hi. I know that this is one of the mos common threads here, I have been doing some research, but i didn't find any similar. The main issue is that I have seen tombstoning since two weeks ago, it is more characteristic on 0603 resistors (Stackpole e
Electronics Forum | Mon Jun 18 13:29:34 EDT 2001 | nifhail
What is the recommanded profile for board which consist of 0402 & 0201 comps. to reduce the effect of tomb-stone. Slow ramp rate ? how slow is considered as slow. Soak time 60 or 120 C,at which end should I stick to? what is the best time before reac
Electronics Forum | Mon May 05 03:53:41 EDT 2003 | praveen
Do not 'ON" the nitrogen during reflow. If the pad of the chip is bigger then reduce the pad width from out side. Reduce the ramp rate at any point of the profile below 1 deg c/sec.
Electronics Forum | Mon May 05 03:53:47 EDT 2003 | praveen
Do not 'ON" the nitrogen during reflow. If the pad of the chip is bigger then reduce the pad width from out side. Reduce the ramp rate at any point of the profile below 1 deg c/sec.
Electronics Forum | Fri Sep 11 15:20:53 EDT 2020 | rsatmech
Yes it's 0201. Homeplate design is not recommended. Simple going to reduce the aperture size. Just planning to reduce it in both the pad cornor. What's your recommendation.
Electronics Forum | Wed Jan 18 09:18:49 EST 2006 | samir
I had the same exact problem recently. I did exactly as the gentlemen said, and reduced the B/S zones 20 or so degrees, AND changed to medium convection. I'd like to point out that the B/S components still go liquidous (such is the Physics of convec
