Industry News | 2010-12-01 15:42:43.0
Christopher Associates introduces the S3X-BF70M and 200N series wafer bumping pastes. The pastes exhibit a high definition over time and at elevated temperatures.
Industry News | 2021-03-30 11:37:02.0
Austin American Technology (AAT) is pleased to announce that it has entered into a collaborative relationship with Specialty Coating Systems (SCS). SCS Ionic Contamination Test Systems set the standard of quality for the industry. Designed for fast and accurate ionic contamination cleanliness testing, the systems provide a precise, repeatable and rapid method for determining cleanliness and deliver immediate process control results, eliminating the need for outside laboratory testing.
Industry News | 2003-06-13 10:10:58.0
By combining PacTech's electroless under bump metallization (UBM) processing with DEK's advanced mass imaging systems to create the solder bumps, users can implement a wafer-level, SMT-compatible flip chip assembly process.
Industry News | 2018-12-08 03:29:29.0
SMT Dictionary – Surface Mount Technology Acronym and Abbreviation
Industry News | 2018-12-08 03:24:24.0
RoHS Guide in Electronics: RoHS, WEEE and Lead-Free FAQ
Industry News | 2014-06-24 06:41:49.0
Essemtec’s high-speed Paraquda SMD pick-and-place system and Fino semi-automatic screen printer have recently been installed at the high-end consumer audio company, AVM-TEC, based in Denmark. The company is a small business specialising in top of the range OEM modules, DIY module based plug & play systems and Pre & Power-amp One amplifiers under the brand name Alluxity.
Industry News | 2019-09-20 08:45:31.0
09.19.2019 – Boca Raton – “Having worked in the electronics manufacturing industry since graduating from University of Maryland in 1980 with a BSEE, it’s truly puzzling to me that sophisticated machines capturing so much data have not been used to their full potential”, says Frank Mascetti, Owner of Technical Resources Corporation (TRC). For decades, he has witnessed this with respect to semiconductor test systems to In-Circuit Test to assembly and inspection machines alike. When he transitioned from electrical engineering into his sales profession many years ago, he listened to “spinmeisters” who worked very hard on creating a story with sales collateral. The companies acted like “it’s simply magic” and we can “plug all these boxes into one another.” In short, “Industry 4.0 will solve everything.”
Technical Library | 2023-06-12 19:00:21.0
The SMT print process is now very mature and well understood. However as consumers continually push for new electronic products, with increased functionality and smaller form factor, the boundaries of the whole assembly process are continually being challenged. Miniaturisation raises a number of issues for the stencil printing process. How small can we print? What are the tightest pitches? Can we print small deposits next too large for high mix technology assemblies? How closely can we place components for high density products? ...And then on top of this, how can we satisfy some of the cost pressures through the whole supply chain and improve yield in the production process! Today we are operating close to the limits of the stencil printing process. The area ratio rule (the relationship between stencil aperture opening and aperture surface area) fundamentally dictates what can and cannot be achieved in a print process. For next generation components and assembly processes these established rules need to be broken! New stencil printing techniques are becoming available which address some of these challenges. Active squeegees have been shown to push area ratio limits to new boundaries, permitting printing for next generation 0.3CSP technology. Results also indicate there are potential yield benefits for today's leading edge components as well. Stencil coatings are also showing promise. In tests performed to date it is becoming apparent that certain coatings can provide higher yield processing by extending the number of prints that can be performed in-between stencil cleans during a print process. Preliminary test results relating to the stencil coating technology and how they impact miniaturisation and high yield processing will be presented.
Industry News | 2024-02-19 12:43:52.0
KYZEN will exhibit at the SMTA Capital Expo and Tech Forum, scheduled to take place Thursday, March 7, 2024, at Sweeney Barn in Manassas, Virginia. The KYZEN Clean Team will provide expert insight on improving stencil cleaning processes and information about the KYZEN E5631 and E5631J solutions.
Industry News | 2017-11-09 15:19:06.0
Ascentech, LLC will exhibit at and participate in the 2017 SMTA New England Expo and Technical Forum on Thursday, November 16, 2017 at the DCU Center, 50 Foster St., Worcester, Massachusetts. Ascentech will highlight the Inspectis C12 and the GEN3 Gensonic Ultrasonic stencil cleaner, and will discuss all of the products in the Ascentech product line in booth #0103.
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