Electronics Forum | Tue Sep 21 13:12:56 EDT 1999 | Dave F
| My stencil thickness is 6 mil and we got qfp's with fine pitch. | how many percent should i reduce my stencil aperture using a 6 mil stencil for 0.5 mm pitch and 0.4 mm pitch ? | | thanks | Greg: I was going to link you to the IPC land pattern c
Electronics Forum | Thu Jun 26 21:38:31 EDT 2003 | Dreamsniper
Hi Guys, Need your good advice about this for a 5 thou stencil thickness: 0603 pad is 50mil x 40mil 0805 pad is 75mil x 45mil 1206 pad is 70mil x 50mil I want the above apertures to be in IPC STD Homeplate Design + an area reduction of 15%. Will t
Electronics Forum | Mon Sep 17 16:03:13 EDT 2001 | jschake
The results from an experiment comparing 27 different combinations of pad dimensions concluded that the pad design with 15 mil pad length, 12 mil pad width, and 9 mil pad separation produced the best assembly yields. A 5 mil thick laser cut stencil
Electronics Forum | Fri Jan 17 15:36:23 EST 2003 | davef
How do 0.5 mm pads on the board help paste release from the stencil? Paste release from the stencil is a function of: * Paste * Printer operation * Stencil design You have no obligation to made your stencil apertures the same size as the pads on yo
Electronics Forum | Sun Sep 05 12:59:48 EDT 1999 | Dean
| Could someone shares their experience on the causes of 'Open' in the BGA after reflow. | | Single sided BGA assy? Or double sided BGA assy (BGA's on both sides)? I have processed double sided (MIrror assy.) bga assemblies and can tell you it is
Electronics Forum | Fri Sep 07 11:46:29 EDT 2018 | dleeper
Air gap on the PCB is determined the pad spacing which in turn is governed by the component. As long as the PCB designer is following the typical BGA layout best practices; i.e no open via in pad, non-solder mask defined pads, solder mask covered tra
Electronics Forum | Mon Jun 29 13:51:29 EDT 1998 | Russ Miculich
| WHAT SHOULD THE RATIO BE OF STENCIL APERATURE TO PAD TO GET GOOD QUALITY RESULTS. BY THAT I MEAN, A MINIMM OF SOLDER BALLS, AND LITTLE TO NO BRIDGING, SHORTS, ETC.. | RIGHT NOW WE ARE USING A 1:1 RATIO, BUT ARE INVESTIGATING REDUCING THE APERATU
Electronics Forum | Mon Jun 29 13:50:48 EDT 1998 | Russ Miculich
| WHAT SHOULD THE RATIO BE OF STENCIL APERATURE TO PAD TO GET GOOD QUALITY RESULTS. BY THAT I MEAN, A MINIMM OF SOLDER BALLS, AND LITTLE TO NO BRIDGING, SHORTS, ETC.. | RIGHT NOW WE ARE USING A 1:1 RATIO, BUT ARE INVESTIGATING REDUCING THE APERATU
Electronics Forum | Tue Oct 12 05:09:13 EDT 1999 | Brian
| | | | | | | Can anyone tell me the formula/method to determine | | | | | | | the amount of weight that solder's surface tension can support. | | | | | | | (ie: Maximum weight of components soldered onto a bottom side | | | | | | | of a board during
Electronics Forum | Wed Jun 20 12:07:13 EDT 2001 | Steve
I would suggest getting a copy of IPC-SM-782A, Surface Mount Design and Land Pattern Standard, and IPC-7525 Stencil Design Guidelines. My experience is that reflow does not cause tombstoning very often. Pad and land design, paste volume, and placemen
