Electronics Forum | Wed Apr 27 01:20:22 EDT 2005 | Frank
Are you sure about your dimensions? .45mil ball diameter and .8mil pitch, and a body size of 16x8mils is really, really tiny. I assume you mean millimeters and not mils? 1mil = 0.0254millimeters If your stencil is 5mils and your ball diameter is
Electronics Forum | Sat Jan 23 16:31:09 EST 1999 | Steve Gregory
| Hi Everyone, | We plan to build, for reliability/experimental/research purpose some CSPs (namely Tessera microBGA 46-I/O 0/75mm pitch and TI 64 I/O 0/8 mm pitch). the various factors that we plan to evaluate are the reliability and assembly concern
Electronics Forum | Thu Jun 19 21:39:31 EDT 2008 | mika
Hi, we used to have a RoHS package with uBGA 380 Solder ball's 0.8 mm pitch approx 15x15 mm, bump size is 0.4mm on a 0.33mm pad. Suddenly we need to use another vendor for various reasons. However, the new bump size is 0.45mm according to specs and t
Electronics Forum | Wed Apr 12 20:41:31 EDT 2000 | Dave F
Russ: That�s a pretty stand-up postin� bud. It�s neat that you can root-out that dirt. We couldn�t dig-up that stuff, if they threatened to shoot the dog. You could be correct about using convex for waving. We don�t wave RNET as Philips suggests
Electronics Forum | Sat Jun 09 00:53:34 EDT 2001 | ianchan
Hi Folks, My Production runs a uBGA-liken product, and uses Pallets to support the 0.8mm thick pcb, during the SMT + reflow oven process. Process/QA see occurs: 1) 0402 unsolder? 2) 0402 tombstone? 3) "uBGA" poor-visual joints (dry joints)? Took
Electronics Forum | Thu Jul 12 21:41:35 EDT 2001 | mugen
A) Questions: 1) What sort of pallet materials used? 2) what PCB thickness & LxW size? 3) what stencil type & thickness used? 4) what profile type used (peak deg-C)? 5) any peak Deg-C contraints for the components SMT onto the PCB? B) We use pallet
Electronics Forum | Tue Aug 31 19:16:59 EDT 1999 | Steve Surtees
| I am looking for a rule of thumb regarding the maximum ramp standard components (chip capacitors) can tolerate without failure during the reflow process. The standard seems to be 3C\second, but this figure is generally derived from the average ram
Electronics Forum | Tue Aug 31 20:41:45 EDT 1999 | Dreamsniper
| | I am looking for a rule of thumb regarding the maximum ramp standard components (chip capacitors) can tolerate without failure during the reflow process. The standard seems to be 3C\second, but this figure is generally derived from the average r
Electronics Forum | Thu Jun 09 13:30:34 EDT 2005 | PWH
I would suggest 7mm thick "Durostone" as a carrier material. Cut lip/pocket for PCB so it is 0.05" thinner than thickness of PCB. Allow 0.010" gap on all sides of PCB. Machine lip to width between 0.050" and 0.100" to support under perimeter sides
Electronics Forum | Wed Apr 04 03:07:16 EDT 2007 | pavel_murtishev
Good morning, Problem definition Poor soldering of thermistors with Ag/Pd termination Background Process: lead free reflow soldering Paste type: Multicore LF300, SAC305 Component type: 0805 chip thermistor, Ag/Pd termination PWB finish: immersion A
