Electronics Forum | Sun Nov 28 20:30:51 EST 1999 | Greg H
What are the possible consequences when there's a flux entrapment (location: vias under components)under components during wave soldering? thanks
Electronics Forum | Mon Jan 08 20:33:15 EST 2001 | Kyung Sam Park
Where can I find this kinds of S/W for SMT PROCESS. With defects collected for each smtline Analyze the cause of defect using D/B in smt process automatically(DB means cause of defects in smt process already prepared with for a long period ex
Electronics Forum | Tue Jun 26 19:48:29 EDT 2001 | davef
Information a SIR test vehicle can be found in IPC-9201, SIR Handbook [http://www.ipc.org]. Common test boards are: * IPC-B-24 (copper and HASL, FR-4 and polyimide) * IPC-B-36 (bare copper and HASL, FR-4 and polyimide) * IPC Phoenix board (bare copp
Electronics Forum | Tue Nov 30 16:50:20 EST 1999 | Dave F
Greg: It depends on the specifics of the flux you are using. You didn�t say. Generally, using a: � "No-clean flux" should create no flux entrapment problems for most applications. � RMA with 25% or more solids as a "no-clean" should create no flu
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