Electronics Forum | Tue Dec 17 17:47:49 EST 2002 | Tim Marc
Dave, I�m talking about the 75% vertical fill of solder IPC 6.3 criteria (B), and 6.3.1 Fig 6-5. I also referred to the annular ring of the Plated-Through-Hole, being coated with solder mask. Semantics, yes I did refer to the Plated-Through-Hole (Sup
Electronics Forum | Sat Feb 28 08:15:50 EST 2004 | davef
J-STD-001 has what you need. 3.6 Facilities ......................... 4 3.6.1 Environmental Controls ........... 4 3.6.2 Temperature and Humidity ......... 4 3.6.3 Lighting ......................... 4 3.6.4 Field Assembly Operations ........ 4 3.6.5
Electronics Forum | Tue Nov 11 02:36:56 EST 2003 | Henry Lee
Anyone who has experience in IPC-TM-650 Environment test Method 2.6.3.1? I have a question. It is the procedure to finish electrical connections. According to 2.6.3.1D, there are apparatus which are solder pot, soldering iron and flux. Then solder a
Electronics Forum | Wed Nov 12 20:24:45 EST 2003 | Henry
Anyone who has experience in IPC-TM-650 Environment test Method 2.6.3.1? I have a question. It is the procedure to finish electrical connections. According to 2.6.3.1D, there are apparatus which are solder pot, soldering iron and flux. Then solder a
Electronics Forum | Wed Nov 12 21:07:47 EST 2003 | davef
Please email us.
Electronics Forum | Wed Jul 06 07:02:27 EDT 2005 | davef
Try: * A-610D, 6.3 � Wire / Lead Preparation - Tinning * J-STD-001D, [There is probably something. We'll look later.]
Electronics Forum | Thu Apr 01 14:34:58 EDT 2010 | jgalarza
I had a Cognex card go out on me today. Does anybody know which Cognex card versions I can use with my UP2000 software version 6.3D?
Electronics Forum | Tue May 05 09:58:51 EDT 2015 | anirudh_thabjul
hi everyone, I have done with my PCB Prototyping. I need to Prepare a Bill of Materials(BOM) for my PCB Assembly. I have one doubt regarding selection of SMD Capacitor. -My Question is For Example, I have to use 0.1uF capacitor on my PCB board.In
Electronics Forum | Tue Nov 10 12:30:55 EST 2009 | thanh
hi all! i have a 5 zone BTU (V70) have it set up at 120, 150, 180, 190, 230 and 22 IPM. but i having 1 here 1 there 0402 tomstone, need advise how to set up the best profile to avoid tomstone. i'm using INDIUM 6.3 W.S lead paste. thank you.
Electronics Forum | Thu Sep 03 22:03:32 EDT 2020 | SMTA-64386139
Both conditions are acceptable for this bottom brazed flat pack package. The solder coverage must be within 0.070 inch of the lead/package interface per MIL-PRF-38535, paragraph A3.5.6.3.4.a. While that requirement could allow for a gold gap near t
