Electronics Forum | Mon May 10 14:40:14 EDT 2004 | hertenstein
I am looking for a industry specification for the amount of strain that is allowable during a parallel blade shearing operation as related to ceramic capacitors. Does anyone know of such a specification? Best regards, Jeff
Electronics Forum | Mon May 10 15:26:11 EDT 2004 | hertenstein
Sorry, I was not clear. I am interested in the strain on the PCB during depanelization using a parallel blade shear. And the effect on ceramic capacitors on the PCB. I was not shearing the capacitor off of the PCB. Regards, Jeff
Electronics Forum | Mon May 10 17:33:13 EDT 2004 | davef
Oh, OK. There is not specification for that either. Capacitor fabricators [eg, TDK, Kemet, AVX, etc] give good guidelines. For instance: http://www.kemet.com/kemet/web/homepage/kechome.nsf/vapubfiles/F2111/$file/F2111.pdf
Electronics Forum | Mon May 10 15:02:37 EDT 2004 | davef
There's no such specification. Not should there be. Shear tests [in our opinion] are senseless, because: * Solder joint strength in pull/shear varies with lead geometry, solder volume, lead metal/metallization, and the way the test is done. * She
Electronics Forum | Wed Jul 04 12:35:19 EDT 2001 | davef
I thought I responded this this a while ago, guess NOT!!! Wow, Dano yagot Entek boards that are that old!!!! Coo. Sounds kwazy that you�d end-up with that volume of old boards, but it�s probably one of those deals where correcting the problem keep
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