Electronics Forum | Wed Sep 15 06:53:48 EDT 2004 | John
Hi Everybody, Can enybody tell me what is acceptable level of defects for Wave soldering?I know that it's depends of many factors,but I want to benchmark my process. Thank you
Electronics Forum | Wed Sep 15 09:49:28 EDT 2004 | pjc
zero- strive for no post wave "touch-up"
Electronics Forum | Wed Sep 15 13:47:35 EDT 2004 | davef
Here one stake in the ground: http://www.thepdfshop.co.uk/ppm/Index.asp
Electronics Forum | Wed Sep 22 22:30:50 EDT 2004 | davef
We are aware of no such standard. You need to determine the acceptable level for your product in its use environment.
Electronics Forum | Tue Sep 28 08:04:26 EDT 2004 | davef
Grayman: How does a "solder wave optimizer" replace fax paper to indicate flux penetration of PTH?
Electronics Forum | Wed Sep 15 11:05:16 EDT 2004 | rlackey
Hi John, It depends on what equipment and resources you have at your disposal - if you have an antique wave with crap adjustment & hand sprayed flux, no debridging/air knife system on a tightly packed board with a multitude of fine pitch connectors
Electronics Forum | Tue Sep 28 05:04:10 EDT 2004 | grayman
In obtaining almost zero defect in solder wave. I would like to suggest the following: First,We must consider changing machine if it is more than 5 years old. second, use the right tools for the right job. Most of the traditional engineers will us
Electronics Forum | Tue Sep 28 08:56:01 EDT 2004 | grayman
"The optimizer has FLUX DISTRIBUTION WINDOW it measures - the amount of flux applied. -Identify uneven distribution of your flux. The FLUX DISTRIBUTION WINDOW permits you to obtain information about your fluxer's performance and repeatability
Electronics Forum | Wed Sep 15 23:15:55 EDT 2004 | pdeuel
Im with Pete, Zero defects. We have high defect rate for many reasons. No line tech, operators set up and run then when QA reports defects engneers are called. Not to make people mad but our process engneers are lacking practical experance to fix pro
Electronics Forum | Sun Dec 17 22:55:45 EST 2006 | foolat
I'd like to know how much capacitor offset from the pad should be acceptable? What are the risks of the placement offset if greater than the acceptable level? I'm still quite new to this so any help will be very much appreciated. Thanks
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