Electronics Forum: acceptable chloride levels (Page 5 of 25)

PCB green mask darker

Electronics Forum | Mon Sep 14 23:10:22 EDT 2009 | linseeg

The PCB green mask will become darker after few times IR reflow? What is the reason? Any acceptance spec refer to green mask requirement? Any method to measure the color level for PCB green mask? By naked eye or machine?

Problems with diode during wave soldering

Electronics Forum | Fri Sep 14 06:12:41 EDT 2012 | mbnetto

Hi Arturo. Thanks for you reply. The board is being loading so that the wave bath touch the 2 pads at the same time... I increased the chip wave in a maximum accepted level... One more rpm on the pump the wave sill overflow the board... Thanks...

solder paste height standard

Electronics Forum | Tue Jan 07 23:38:08 EST 2014 | m_imtiaz

want to know the tolerance the paste height in the solder paste printing. for example if stencil thickness is 7 mil, what will the acceptance level of paste height ( upper and lower) kindly share if any guidelines or formula for the same

Contamination test

Electronics Forum | Mon Jul 30 21:03:44 EDT 2001 | davef

You should specify the level of res based on the effect of the res on the end-use of the product. J-STD-001 defines cleanliness requirements for ALL flux types, including water soluble and no-clean that you mention. 1 There is no equivalency betwee

haloing on SMT PCBs

Electronics Forum | Mon Jun 08 13:26:59 EDT 1998 | D.Hammond

I work QA at an OEM in Alberta, Canada. I saw earlier posts on the smtnet regarding PCB haloing criteria. I am currently in a dispute with my PCB vendor over the acceptability of haloing (delamination) around plated through holes and vias on a lot of

How to Differentiate Class 3 and Class 2 products in terms of process

Electronics Forum | Tue Dec 30 09:31:52 EST 2014 | rgduval

I've always approached it like this: Design your processes and perform your work to class three standards, and inspect to the standard that is acceptable. That is, all work should be performed to the highest degree of quality. When the work is ins

Re: Cleanliness Testing/Conformal Coating

Electronics Forum | Tue May 11 07:50:52 EDT 1999 | Graham Naisbitt

| If I clean my assembly and find no visable contamination with the unaided eye, do I need to do cleanliness testing prior to conformal coating? | Douglas, It is highly advisable to test for ionic contaminants because a coating seals in as well as

Re: Wavesolder process characterization

Electronics Forum | Thu Feb 19 12:45:05 EST 1998 | Earl Moon

| I have an Electrovert Ultrapak 445 Wavesolder machine with 3 IR preheat zones and a single wave with omega wave. | I want to run a DOE (Taguchi) to determine the optimum settings for soldering both single-sided and | double-sided boards. Can any

Unusual solderability issue

Electronics Forum | Mon Apr 19 15:45:21 EDT 2010 | dwonch

Thanks to all for your input. We did have a third party do an analysis on boards from the first shop. They were shipped directly from the board shop to eliminate the possibility that we could contaminate them. The third party (Forsite) did find Sili

TSOP lead deformation (help)

Electronics Forum | Mon Jan 26 10:15:51 EST 2009 | john123

Can anyone help me determine the acceptability level for lead deformation (see attachment). The outer two leads on the left side were bent during the pick and place centering operation. I've looked in the IPC-A-610 book and could only find informa


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