Electronics Forum | Fri Feb 24 06:42:08 EST 2006 | SIR
What is the IPC norm wich drives the IPC stencil aperture design? The contest is: a stencil for the deposition of solder pastes on bare boards Thanks
Electronics Forum | Fri Mar 06 10:30:46 EST 1998 | Ron Costa
| | | Hello everyone! | | | Does any know anything about bare board size variations? | | | Is there a spec. or tolerance? | | | I'm running small lots of boards and during the screen printing process | | | I find that I cannot paste each board perfec
Electronics Forum | Wed Jul 11 20:17:05 EDT 2001 | davef
I�ve written a review to be published in an up-coming SMTnet Newsletter of �Printed Circuit Assembly Design� Leonard Marks, James A. Caterina [Hardcover - 368 pages (July 26, 2000) McGraw Hill Text; ISBN: 0070411077]. In short, � In �Printed Circui
Electronics Forum | Wed Dec 20 21:01:12 EST 2000 | Dave F
Talk about glam jobs � About once a month, we�d go over to the slaughter yard to get cows� teeth for Dr. Mueller. Then we�d fixture them on their side and run them in a machine that scrubbed them with a brush for weeks. The cool thing about cows te
Electronics Forum | Tue Jan 11 09:47:01 EST 2000 | Dave F
Abbas: Sources of information on DFM/DFT are: � "SMTnet Express" articles on DFM by Earl Moon � IPC-D-279, 'Design Guidelines for Reliable Surface Mount Technology Printed Board Assemblies' � Books in SMTnet and SMTA book stores � Other examples ar
Electronics Forum | Mon Oct 21 22:15:36 EDT 2002 | davef
First, SIR data is heavily dependant on the test pattern selected. Be very careful when comparing the results of resistance readings taken from different geometric patterns. Second, if yer talkin': * Bare boards, yupper. * Finished assemblies impor
Electronics Forum | Thu May 27 14:44:05 EDT 1999 | Deon Nungaray
| One of our board fab houses is asking (again) to eliminate the reference designators and polarity markings from boards. This isn't feasible for thru-hole, but what is the industry trend on surface mount assemblies? | Deon Response: Hi Greg, Fr
Electronics Forum | Wed Aug 01 11:03:20 EDT 2001 | Chip Gill
I read your request for design information on panel layout for V-scoring, and felt the need to respond. Scored PWB's are indeed more efficient to produce and depanel than tab routed PWB's, but there are also drawbacks associated with this method. T
Electronics Forum | Thu Mar 11 10:31:57 EST 1999 | Justin Medernach
| NASA CommQuest | | | Photopolymerized Conducting Polymers | | Directions: | 1.Please read the information provided on this technology. You may follow the links to additional information resources below. | | 2.After evaluating the technology,
Electronics Forum | Tue Jan 16 20:34:17 EST 2007 | davef
DAVE�S BOOKSHELF ASSEMBLER�S ESSENTIALS Title: Soldering in ElectronicsAuthor: RJ Klein WassinkPublisher: Electrochemical PublicationsISBN: 090115024XPublication date: December 1989 I know, I know. The book was written in 1989!!!! I use this b
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