Electronics Forum | Thu Sep 12 01:49:28 EDT 2002 | ck
Hi all, Any stencil opening recommendation for 20mils pitch mirco BGA. Currently, using 12mils round opening, 5 mils thickness. Seen to have weak joints as it crack after Ict testing. thks
Electronics Forum | Thu Nov 13 11:45:04 EST 2008 | pbarton
We have seen a similar problem. Turned out to be mechanical stress on the component caused by the method of location and clamping at ICT. Where is the component located on the assembly? Poorly adjusted clamping pillars on clamshell fixtures can cause
Electronics Forum | Tue Oct 26 08:41:56 EDT 2004 | Bob R.
When we first got into BGAs on ENIG we were getting joint cracking at in-circuit test. The joints were breaking in the Sn-Ni intermetallic. We did a lot of pull testing while working with our board suppliers and our conclusion was that pull testing
Electronics Forum | Mon Mar 21 02:41:29 EDT 2011 | kemasta
Hi It's me again. Our products need to pass a chamber test 45c/36hrs after the PCBA completed batch of functional tests and assemble in to case. We found 1 unit was functioning for 24hours in the chamber, but hang after that. We tried to re-boot the
Electronics Forum | Wed Sep 12 18:11:03 EDT 2001 | davef
First, what on the area array package are you analyzing � * Package cracking? * Cracked solder balls? * Er, what? Second, most failure analysis discussions consider dye penetration to be a non-destructive test, but then again most failure analysis
Electronics Forum | Sat Apr 10 01:11:37 EDT 1999 | forest
Our company is going to use BGA(1.27mm pitch) But I have heard of troubles with P-BGA. It is that cracks occured between solderball and gold plating of PCB during ICT(incircuit test). We know that gold plating of PWB is not good for BGA, so we decide
Electronics Forum | Mon Jan 15 11:21:48 EST 2007 | davef
Contractor mantra: * Profile is good * Boards are bad On profiles, the key question is: where did you take the profile? We�d guess cracked connections are giving the intermittent test results when pressing on the components. You use acoustic micro
Electronics Forum | Wed Jan 04 13:47:11 EST 2006 | russ
To answer your question it was mentioned that allowing the boards to cool slightly between reflow and wash may help this case to eliminate thermal shock from immediately going into colder water straight out of the oven with no cooling. In looking at
Electronics Forum | Mon Jun 04 10:40:37 EDT 2012 | davef
I'm not aware of any such stipulation about witness [probe] marks for assembled boards, per se. Certainly, witness marks should not affect the intended performance of the assembly, you know, like damaging the solder connection or smudging solder mate
Electronics Forum | Thu Apr 10 05:25:43 EDT 2003 | dst
Hi, My company is currently experiencing a high feild failure rate on a 100nF chip ceramic that we use in various applications across our product range. One of them being de-coupling which means we use millions of this device every month. The failu
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