Electronics Forum: board and dimensions (Page 6 of 108)

Leaded and Lead Free BGA's on hte same board

Electronics Forum | Thu May 01 15:11:37 EDT 2008 | dphilbrick

CK So as I see it batch B represents a leaded process with leaded components and D is a leaded process with lead free components. Batch Components Paste B SnPb Sn62 D Lead-free Sn62 If so it is BETTER to run a lead free BGA with Sn

High-end SPI and AOI?

Electronics Forum | Tue Jan 12 21:24:13 EST 2010 | graceytiu07

We have a Viscom SPI S3054QS. Yup, the machine offers a quite good speed. My board dimension is 150 by 250mm. The cycle time is only about 24 sec. The analyze time is only about 10sec. You can make your loading faster, if that's what you needed. I ha

Re: Attenna assembly for RF board

Electronics Forum | Sun Jan 31 14:03:41 EST 1999 | Dean

| I have a recent design (1 component side only) that calls for 2 surface mounted antenna's (brass plated) to be mounted on a PCB. The problem arises when the PCB is 18x11.25 and has 15 to 20 PCB's in the pallet (IE weight, fixturing to hold the ant

Re: Attenna assembly for RF board

Electronics Forum | Tue Feb 16 13:57:50 EST 1999 | Ron Beasley

| | I have a recent design (1 component side only) that calls for 2 surface mounted antenna's (brass plated) to be mounted on a PCB. The problem arises when the PCB is 18x11.25 and has 15 to 20 PCB's in the pallet (IE weight, fixturing to hold the a

Re: Attenna assembly for RF board

Electronics Forum | Tue Feb 02 10:18:56 EST 1999 | Justin Medernach

| I have a recent design (1 component side only) that calls for 2 surface mounted antenna's (brass plated) to be mounted on a PCB. The problem arises when the PCB is 18x11.25 and has 15 to 20 PCB's in the pallet (IE weight, fixturing to hold the ant

Geometric Dimensioning and Tolerancing

Electronics Forum | Sat Jun 06 09:53:59 EDT 1998 | Earl Moon

GEOMETRIC DIMENSIONING AND TOLERANCING (GDT) Using and applying GDT to printed circuitry and assemblies is very much like applying it to any other design for manufacturing (DFM) or design for assembly (DFA) requirement using concurrent engineering (C

Re: Screen printing the board from........

Electronics Forum | Thu Mar 05 13:17:19 EST 1998 | Justin Medernach

| Hello everyone! | Does any know anything about bare board size variations? | Is there a spec. or tolerance? | I'm running small lots of boards and during the screen printing process | I find that I cannot paste each board perfectly.I've tried other

Re: Screen printing the board from........

Electronics Forum | Thu Mar 05 23:33:53 EST 1998 | Ron Costa

| | Hello everyone! | | Does any know anything about bare board size variations? | | Is there a spec. or tolerance? | | I'm running small lots of boards and during the screen printing process | | I find that I cannot paste each board perfectly.I've t

Re: Screen printing the board from........

Electronics Forum | Fri Mar 06 10:30:46 EST 1998 | Ron Costa

| | | Hello everyone! | | | Does any know anything about bare board size variations? | | | Is there a spec. or tolerance? | | | I'm running small lots of boards and during the screen printing process | | | I find that I cannot paste each board perfec

COB and wire bond

Electronics Forum | Mon May 07 11:02:17 EDT 2001 | Singh

Hi all. I am looking into the implementation of the Chip on Board process with eutactic bonding and the then using either gold or aluminum wire to make wedge type wire bonding. Since I am totally new to this, can somebody guide me thru the process,


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