Electronics Forum: brittle solder joint (Page 16 of 301)

lead free joint finish

Electronics Forum | Thu Jan 29 06:29:33 EST 2009 | sachu_70

There are two profiles available for the Pb-free process: (1) RSS and (2) RTS. In your case, you should try a solder paste that supports RTS profiles. A minimum of 7 zone Refow Oven would be fine on the Pb-free process. However, you may still try by

Open BGA joint

Electronics Forum | Wed Sep 15 17:31:40 EDT 2004 | GS

Once you verified for correct profile ( consider CTE mismatch) make sure before you remove PBA from fixture, the temperature is almost at room temperature. If by removing PBA from fixture,and the PBA gets a little bent (warped) just in the area where

Open BGA joint

Electronics Forum | Fri Sep 17 23:19:07 EDT 2004 | KEN

What is the component ball co-planarity spec? I have encountered many ceramic and ASIC devices that specify 7 mil max. If your stencil is 4, 5, 6 mil you WILL eventually have an open joint. You must deposit solder greater than or equal to your cop

Solder joint issue

Electronics Forum | Thu May 18 11:00:51 EDT 2006 | Chunks

Thanks Doctor - as always, you're right. I must've been typing with my mittens on. It's starting to get cold on this part of the planet these days. I wasn't blaming anyone, just trying to take a few questions marks away so "we're" left with the an

facing cold joint problem

Electronics Forum | Mon Jan 19 14:54:38 EST 2004 | cyber_wolf

How did you come to the conclusion that you are having a cold joint problem. Just by appearance ? As Dave stated if you have any of the metals that he listed in the joints they will appear to be dull and grainy sometimes. But... Dave, I will have t

lead free joint finish

Electronics Forum | Wed Jan 28 21:47:56 EST 2009 | padawanlinuxero

Hello! I am having trouble with the new changes from lead joint to lead free joint, we are working on change to lead free, I am using a 3 zone oven reflow, the zone temps are : zone 1 zone 2 zone 3 (top and bottom) 128 208 260 th

WSOL and solder pot

Electronics Forum | Wed Mar 12 16:30:45 EDT 2008 | operator

I witnessed this at our sister company. It seems to be their standard process. It is not my place to interfere with their processes. I was just curious if there was any chance of brittle solder joints or other defects that might be caused from the WS

qfp and soic joint Problem

Electronics Forum | Tue Apr 11 10:30:46 EDT 2000 | Jeremy Smith

I am having a problem with some joints on a 100 pin pqfp and few different soics on one particular board. When viewed a 8x with a "Mantis" inspection scope the joints look as though they wetted to the ic leg but when probed the leg will pop loose.

ENIG; Au < 0.5 um to avoid solder joint embrittlement

Electronics Forum | Wed Jun 08 23:04:26 EDT 2022 | SMTA-64387544

Au thickness of 0.125 um should not cause solder joint embrittlement. Also, PCB fab should offer Au thickness range between 0.05-0.075 um for better process control and reliability. Higher Au thickness may suggest black pads leading to solder joints

need IPC standards for lead free solder joint reliability tests

Electronics Forum | Thu Dec 09 17:45:27 EST 2004 | davef

You're correct. There is no criteria for no-lead, but there none for SnPb, either. Solder joint strength in pull/shear will vary with lead geometry, solder volume, lead metal/metallization, the way the test is done.


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