Electronics Forum | Wed Aug 20 17:05:42 EDT 2008 | naynayno
We have experienced contamination under flat chip arrays. The lab report is still open but it appears to be dendrite growth. We have been trouble-shooting our process and cleaning equipment. My question is are there any specific design or best p
Electronics Forum | Wed Aug 20 20:10:30 EDT 2008 | davef
Naw, accounting is boring. Standoff could be an issue. Coupla things: * Above 30 thou, just about any cleaning process, more sophisticated than a garden hose, will produce acceptable results * Below 10 thou, can be cleaned with best efforts, but not
Electronics Forum | Thu Aug 21 08:15:07 EDT 2008 | naynayno
Thanks Dave, I will be sticking with Manufacturing Engineering. These are good guidelines but what is standard clearance for various packages? This is a dimension we usually seek by eye, whether we will have a problem or not. We use straight DI -
Electronics Forum | Thu Aug 21 08:33:09 EDT 2008 | davef
There is no standard as such. It's easy to see why. It's too complicated and has such a small payoff. Standoff is comprised of: * Package height * Solder thickness between the pad and the component lead * Delta of pad thickness and solder mask For p
Electronics Forum | Wed Apr 26 08:13:47 EDT 2017 | spoiltforchoice
MSL 1 is unlimited factory floor time before reflow. I have spools that are 10+ years old and haven't encountered any issues using those parts. It goes without saying those parts are not exactly used in volume so its not a massive sample but that is
Electronics Forum | Thu Apr 12 01:23:04 EDT 2001 | Eric C
Check the pad size. I had this issue before due to the pad size too wide. R&D had change the size of the pad and is solve the issue. Before the pad size change, I had rebuild another stencil with the pad opening close to the component size. It won't
Electronics Forum | Wed Sep 12 18:11:03 EDT 2001 | davef
First, what on the area array package are you analyzing � * Package cracking? * Cracked solder balls? * Er, what? Second, most failure analysis discussions consider dye penetration to be a non-destructive test, but then again most failure analysis
Electronics Forum | Mon Sep 27 04:08:25 EDT 1999 | Earl Moon
| | | I am in the process of picking a new resistor network for one of our new board. Since we are new to SMT i would like to get some opinions on networks. Currently we use one molded gullwing type network on our boards with no problems. Other than
Electronics Forum | Sat Oct 28 08:51:20 EDT 2017 | rvines1
The manufacturer I was having issues with was Panasonic. The parts we use were unmarked, but their catalog pages didn't make any mention of marking and included photos of marked parts. After 6 months of making various unsuccessful contacts with Pan
Electronics Forum | Thu Sep 11 15:23:31 EDT 2003 | Peter L.
I have come across a rash of failed assemblies that have 0805 capacitors and resistors, bottom side glued, wave soldered and washed. Trouble shooter reported touching up the solder joints on a few areas and the boards would pass test. I had a look a
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