Electronics Forum: cleanliness bare pwb (Page 1 of 10)

pwb warpage

Electronics Forum | Mon Feb 02 16:42:03 EST 2004 | davef

Bow & twist for bare boards and panels: IPC-A-610 1.5% for PTH only and 0.75% for SMT. So, what are you doing to these poor boards to make them warp?

Manufacturing and test room cleanliness

Electronics Forum | Mon Feb 05 10:12:32 EST 2007 | slthomas

The use of booties isn't required per se, just considered a standard step necessary to reach the 10,000 target. You also need to vacuum (central vac system, NOT exhausting into the room) daily, mop weekly, have a one piece floor, blah, blah, blah....

PCB cleanliness test house in Malaysia/Singapore

Electronics Forum | Tue Nov 02 08:24:31 EST 2004 | bpevear

We are looking to have some PCBs (bare and assembled) independently tested for cleanliness. Our mfg facility is in Malaysia. Can anyone recommend a test house capable of testing to IPC-6012, IPC-5701, etc.

Re: Urgent !! Need to set up incoming boards cleanliness spec

Electronics Forum | Fri Oct 09 23:17:05 EDT 1998 | kallol Chakraborty

| | I need to set a cleanliness limit for our incoming boards. I know that some people use 14-10 microgr. sq. in. But how can I determine what is best for me. | | Can anybody tell me if there's a standard for this. | | Right now we are using an Alph

SIR starting point...?

Electronics Forum | Mon Oct 21 22:15:36 EDT 2002 | davef

First, SIR data is heavily dependant on the test pattern selected. Be very careful when comparing the results of resistance readings taken from different geometric patterns. Second, if yer talkin': * Bare boards, yupper. * Finished assemblies impor

IONIC CLEANLINESS SPEC FOR BARE PWBs

Electronics Forum | Tue Dec 10 18:30:15 EST 2002 | MikeF

From personal experience, if the PWB vendor is cutting costs and doing their final rinse with tap water instead of DI you will get ionic contaminants left on the board. You might consider having CSL, or one of the other independent labs mentioned e

Test vehicle for PWA cleaning

Electronics Forum | Tue Jun 26 09:37:28 EDT 2001 | Steve Vargas

We are interested in doing some further studies on our cleaning process, particularly with respect to how well we can clean underneath low profile components. As an SMT subcontractor, we'd ideally like to qualify our chemistry/cleaning process to cer

IONIC CLEANLINESS SPEC FOR BARE PWBs

Electronics Forum | Mon Dec 09 08:30:13 EST 2002 | MA/NY DDave

Hi Well you already got good answers with some diversity, yet from what I read they are giving you the answers for Assembled PWBs, i.e. post solder or PWAs. I don't remember ever doing this for raw boards. For most of the current pwb finishes it se

IONIC CLEANLINESS SPEC FOR BARE PWBs

Electronics Forum | Thu Dec 12 13:53:01 EST 2002 | gregoryyork

Considering only Ionic residues is very dangerous, most heat transfer fluids that are extremely hygroscopic are also non ionic especially those used in HASL / Roller Tinning fluids. Also consider if the resist is cured or in fact porous which absorbs

IONIC CLEANLINESS SPEC FOR BARE PWBs

Electronics Forum | Fri Dec 06 10:16:57 EST 2002 | davef

Bare board cleanliness is still primarily measured by resistivity of solvent extract (ROSE) using instruments such as Omegameters and Zero Ions. What is considered as "acceptable" cleanliness varies between specification and from company to company.

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