Electronics Forum | Tue Dec 18 15:05:58 EST 2001 | blnorman
What is the maximum allowable thermal ramp rate for wave solder. We have a "short" machine used for selective soldering. To get the boards up to temp, we need to exceed our normal 2�C/sec. Are there any IPC documents governing this process? Anyon
Electronics Forum | Thu Feb 10 09:09:30 EST 2005 | russ
99% (there will always be that one that gets jacked somehow). Your old placement equipmment may affect this by dropped parts that get underneath the BGA, etc.. hopefully the placement accuracy will at least get the parts halfway on pad and they will
Electronics Forum | Sat Feb 05 09:01:15 EST 2000 | Dave F
JS: The issue is not how efficiently/effectively that you can run your placement machine, probably. The issue is how efficiently you can run that part of your assembly process that is the bottleneck. Other than improving quality, optimizing any pa
Electronics Forum | Thu Sep 05 22:01:55 EDT 2013 | davef
Questions are: * How did you determine that the coating on your component leads is oxidation? * What is the oxide? BR, davef
Electronics Forum | Tue Sep 24 08:33:39 EDT 2013 | joekirin
The mechanical centering is used for testing resistors, caps, and other various components. It is also used to center parts by "tapping" them with a set of jaws. When the head picks up the component, it is between these jaws. Each part is setup to
Electronics Forum | Fri Jun 07 14:05:39 EDT 2024 | davidk
I wanted to open a discussion and ask about opinion: What is a normal result of the inspection of an AOI? How many falls calls per component /opportunity is bad/normal/good? How many defects per component/opportunity is bad/normal/good? What is goo
Electronics Forum | Wed Jun 19 15:28:58 EDT 2024 | davidk
Hi Tom, Thank you for your comment 75% FPY is also our target, cause we gonna have the AOIs in the SMT line. So you would expect more opportunities? I didn´t notice but there are not so many components with high opportunity rate. (the average numbe
Electronics Forum | Thu Jun 13 14:41:40 EDT 2024 | tommy_magyar
Hi David, In one of my previous jobs I worked as an AOI/AXI process engineer and we had a set target of 75% FPY. This means that 75% of the boards at IPC Class 3 standards would not have a single false call. This also means you would need to set y
Electronics Forum | Sat Jun 26 02:32:32 EDT 2010 | prinsisgarcee
how do i calculate false call rate? i got this equation = [over reject / (total solder joints + components) ] * 1000000 and i got a table which shows data like number of solder joints, components on panel, and number of false call, and the false
Electronics Forum | Mon Aug 04 15:17:38 EDT 2008 | willleu
what is the going rate for fine pitch (microscope) SMT assemblers? i have several opportunties available in San Diego and would like to know what to offer. candidates must also be able to identify components, read assembly drawings, and must be U.S
