Electronics Forum: defect map (Page 1 of 1)

Quality / Defect tracking

Electronics Forum | Thu Sep 04 16:44:19 EDT 2003 | mleber

We are a military contractor running mixed technology CCA's. We currently "map" all defects off reflow and wave by indicating the defect on a map (plot from gerber) then passing it on to rework. The map is used for SPC data as well as overall perform

Line release of post reflow AOI and AXI

Electronics Forum | Tue Sep 16 19:16:11 EDT 2008 | hegemon

Hello everyone! > > I'm a student of electrical > engineering currently working on a thesis for my > BSc degree. It will be about post reflow AOIs and > AXIs, and I'd kindly like to ask you for some > help with it. > > I would like to know if t

SMT Process Engineering Consulting Rates

Electronics Forum | Mon Jun 02 15:38:20 EDT 2008 | wavemasterlarry

I have a pretty good system for my counsultency rates of charge. It is a multi-tire system so to speak.I took a seminar on value stream mapping which is how come I know this stuff.I catgorize my consulting fees by area of expertise of course. Exampl

Solder balls

Electronics Forum | Tue Nov 19 21:38:39 EST 2019 | zack

Hello, The first thing that you need to do is to make process mapping about this incident, so you can exactly determine all factors and observable changes happened during 2 weeks of timeline difference. According to my experience, if all equipment

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