Electronics Forum | Fri Nov 14 02:18:04 EST 2008 | act_smt
What is the spec or true classification for the leads for an Electrolytic capacitor? Is it a : 1)Flattened coined lead??? or 2)Flat Lug Lead??? There is some confusion as to how we should be inspecting & accepting the toe overhang on these per IP
Electronics Forum | Mon Jul 01 13:38:01 EDT 2013 | emeto
I am also not sure if the Electrolytic capacitor has a "flat lug leads". I think it is more like a coined lead. I hope other experts can advice.
Electronics Forum | Mon Jul 31 03:50:26 EDT 2023 | calebcsmt
Is below the correct interpretation of IPC 610/JSTD requirements for FLAT LUG LEADS (seen on USBs and Diodes mainly) For class 1 or 2, no toe wetting would be required as minimum side joint is only 'evident wetting' and no actual length or fillet he
Electronics Forum | Fri Nov 14 07:56:49 EST 2008 | davef
Section 9 of J-STD-001 gives you what you need. Further: * Flattened [coined] lead: http://workmanship.nasa.gov/lib/insp/2%20books/links/sections/files/711.pdf * Flat lug lead: Look for the Package Designator �LT� on page 7 of http://www.allegromicr
Electronics Forum | Thu Jun 27 17:32:35 EDT 2013 | tpost
We recently had a question come up regarding the amount of solder on a flat underside termination ( we referenced Flat Lug Lead in IPC 610). Judging by the photo you can see on the Left is a target solder joint, but on the right is one which had rewo
Electronics Forum | Wed Mar 31 13:05:46 EST 2004 | JoeH
Anyone used this package? It's Cygnal PN C8051F300. The part has bottom side, flat terminations (like a BGA without the balls). There is metalization on the sides of the package but it's not plated (bare copper). Metalization on the bottom is pla
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