Electronics Forum | Thu Jan 14 09:03:21 EST 2010 | cbart
I really don't have one, however our customers do. Since they see a spec in IPC for BGA's they have either addopted the 25% from the BGA spec or come up with their own. Also many have heard that IPC is working on defining critera. I was hoping othe
Electronics Forum | Mon Feb 22 16:24:52 EST 2010 | blnorman
Depends on how much voiding you have as well. 25% is allowable.
Electronics Forum | Thu Jun 08 01:46:00 EDT 2023 | camilleyang3
To prevent BGA (Ball Grid Array) issues related to SMT (Surface Mount Technology) solder resist when fabricating a PCBA (Printed Circuit Board Assembly), you can follow these guidelines: Design considerations: Ensure proper spacing between BGA pads
Electronics Forum | Wed Jun 03 07:13:27 EDT 1998 | Tom Tellinghuisen
| We have experienced poor adhesion of acrylic conformal coating to plastic bodied IC�s. The observed symptoms of this are a blistering or lifting of the coating at the surface of the component, although peel testing has revealed that this is not al
Electronics Forum | Wed Jun 03 15:22:12 EDT 1998 | Greg Curler
| | We have experienced poor adhesion of acrylic conformal coating to plastic bodied IC�s. The observed symptoms of this are a blistering or lifting of the coating at the surface of the component, although peel testing has revealed that this is not
Electronics Forum | Thu Nov 20 03:58:39 EST 2014 | hhat
To get the best performance of electronic circuits, components and circuit board supports circuit components and devices in electronic products. Even if the circuit principle diagram design is correct, the printed circuit board is designed improperly
Electronics Forum | Thu May 30 09:33:15 EDT 2019 | emeto
Contributors in order of importance: 1. PCB design - if you have large thermal pads, a grid of via holes should be created. Components with low profile will not let the gas to escape from the joint. The only way is going down. 2. Reduce paste volum
Electronics Forum | Mon May 06 06:22:39 EDT 2019 | SMTA-Rogers
Hello! Do you have a better stencil design to reduce the large area of solder joint voids? Or is there a suggested way to set the reflow profile? Or are there other process improvements to make the solder joint at the LED pad less than 10% per void?
Electronics Forum | Mon May 06 11:45:32 EDT 2019 | slthomas
There are quite a few papers out there on the subject. Just enter "SMT void reduction" into google or other search engine and take your pick. That said, slow ramp rates and paste volume reduction are a good place to start. Although I haven't tried i
Electronics Forum | Tue May 07 10:13:06 EDT 2019 | cyber_wolf
I have personally never seen a reflow profile change reduce voids. We have invited "experts" in to demonstrate this claim. They were unable to.
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