Electronics Forum: ipc (Page 202 of 283)

Re: Solder Skips

Electronics Forum | Mon Mar 20 18:15:05 EST 2000 | Russ

Larry, SOTs are a wonderful thing to try and wave solder! They are about as nice as Tant caps. I have found that shadowing is usually the biggest problem assuming that the other wave parameters are good, in your case it seems that they are. Couple

Re: Tools / Methods to remove solder balls

Electronics Forum | Thu Mar 16 10:41:34 EST 2000 | Russ

Are we talking midship SMT or wave soldering? SMT - I have found the best method is not having them (WOW) this can be accomplished through pad design, aperture design, placement accuracy, and profiling, It is my understanding however, that these

Re: footprint formula

Electronics Forum | Fri Mar 03 10:07:15 EST 2000 | Wolfgang Busko

Hi Jacqueline, - what a name in this technical world - I just tried the calculator and for example choose the CQFP and then selected other and an input mask appeared where you have to fill in the required data from the components datasheet. I have to

Re: footprint formula

Electronics Forum | Wed Mar 08 10:52:27 EST 2000 | Wolfgang Busko

Hi Jacqueline, for the "manufacturing allowance" IPC says FAB.TOL. is the board manufacturing tolerance and PLACE ACRCY is the pick and place accuracy. For 0,8 mm pitch they give for both values 0,1 mm. Solder joint design goal data comes from empir

Solder paste amount

Electronics Forum | Tue Jan 16 09:23:26 EST 2001 | P.Gerits

Hello, Standard way to calculate stencil design can be done as follows: A normal ratio of aperture width/stencil thickness = 1.5 for pitches below 650u A normal ratio of stencil aperture width against pad width = 0.8-0.9 (or stencil aperture 10%-20

Reflow soldering through hole parts

Electronics Forum | Wed Jan 31 01:41:00 EST 2001 | pjc

Steve, I have no influence over conn design. We paste print-reflow solder two types of connectors. One is a 50 pin IDC w/ 0.5mm lead dia @ 2.54mm lead pitch and a chamfered pointed lead tip. The other is 32 pin DIP w/ 0.36mm lead dia @ 2.54mm pitch

FBGA Stencil Apertures

Electronics Forum | Wed Feb 07 09:46:20 EST 2001 | pjc

I need some guidance here. I've got a new board w/ a FBGA-48 package, Samsung CMOS SRAM. It's a full matrix BGA w/ 0.30mm-0.40mm ball diameter @ 0.75mm pitch. Balls are eutectic. PCB land diameter is 0.4mm. There are TSOP I 0.5mm lead pitch component

Material Ageing and Storage

Electronics Forum | Thu Feb 22 10:32:25 EST 2001 | CAL

SCOTT- We do solderability testing for the electronics industry using a Multicore and Kester Wetting Balance testers. The standards we test to is IPC J-STD 002 for components and J-STD 003 for PCBs. There is also a system called SERA we co-developed

reworking brds by flowing the board thru' oven for the 3rd times

Electronics Forum | Mon Mar 19 08:56:17 EST 2001 | fmonette

One very important consideration in your situation is to determine if you have moisture sensitive components on these boards. If you have any device classified level 3 or higher then you have a very high level of risk associated with moisture sensit

Gold Contacts

Electronics Forum | Fri Mar 23 11:58:01 EST 2001 | mparker

You are mixing long exposed paste back into fresh? How long has your fresh jar been open to the air? You are probably doing yourself a disservice by scavenging the paste (it could have moisture entrapped). Your visocity has definitely changed. You a


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