Electronics Forum | Mon Sep 23 03:12:01 EDT 2002 | surachai
We encounter this problem also , I know that it 's acceptable per IPC standard but sometime it fail at ICT and FCT , then this problem should be prevent , we found it with QFP 16 mil pitch and the defect looklike negative wetting at the front of lead
Electronics Forum | Tue Jun 06 11:57:12 EDT 2006 | Chunks
IPC 610 says acceptable Class 1 (Class 2, 3 indicator) if they are entrapped/encpsulated balls within 0.13mm of lands or pads. or exceed 0.13mm in diameter. Defect Class 1,2,3: Solder ball violates min electrical clearance. Solder balls not entrap
Electronics Forum | Tue Mar 06 09:18:33 EST 2001 | davef
Two things: 1 Go to IPC and buy "TP-1115 - Selection & Implementation Strategy for A Low-Residue No-Clean Process - Provides direction to electronics manufacturers interested in adopting low residue (LR) assembly technology. It addresses the concern
Electronics Forum | Sat Dec 14 02:29:52 EST 2013 | padawanlinuxero
Hello I hope this helps For a component with axial leaded - vertical The clearance of the component body or weld bead above the land is 1.00mm (0.039in) Component body must be perpendicular to the board The overall height does not exceed maxim
Electronics Forum | Fri Jan 15 08:09:56 EST 1999 | Jason Hall
| I saw the problem of void in solder bump or in lead less component or some BGA. But I didn't have standard specification of that void is accept or reject? Do any body have the better idea or suggestion of the criteria ? | | Thank you, | Wirat
Electronics Forum | Fri Jan 15 08:11:34 EST 1999 | Jim Nunns
Our spec on voids is 30% ball diameter in the center. On the component to ball and pad to ball interface, we use 25%. To determine this spec, we asked around. I don't know of any studies that have been done to verify if this is OK Regards Jim |
Electronics Forum | Fri Jan 15 15:29:03 EST 1999 | Jason Hall
| Our spec on voids is 30% ball diameter in the center. On the component to ball and pad to ball interface, we use 25%. To determine this spec, we asked around. I don't know of any studies that have been done to verify if this is OK | | Regards | Ji
Electronics Forum | Fri Jan 15 13:35:03 EST 1999 | Terry Burnette
| I saw the problem of void in solder bump or in lead less component or some BGA. But I didn't have standard specification of that void is accept or reject? Do any body have the better idea or suggestion of the criteria ? | | Thank you, | Wirat
Electronics Forum | Sat Jan 16 03:06:36 EST 1999 | Wirat S.
| | Our spec on voids is 30% ball diameter in the center. On the component to ball and pad to ball interface, we use 25%. To determine this spec, we asked around. I don't know of any studies that have been done to verify if this is OK | | | | Regard
Electronics Forum | Fri Aug 06 10:27:05 EDT 1999 | Kenneth Hedman
| | I saw the problem of void in solder bump or in lead less component or some BGA. But I didn't have standard specification of that void is accept or reject? Do any body have the better idea or suggestion of the criteria ? | | | | Thank you, |
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