Electronics Forum: ipc-610 voids in track (Page 1 of 1)

Large Voids with Via in Pad

Electronics Forum | Tue Apr 13 13:18:50 EDT 2004 | arcandspark

David F. thanks for information about the copper plating issues, I will check out the Indium site as you suggest. You are right about Thermount being Unreworkable, but T.I. makes us do it due to the cost of these RF proto types, $250 each bard board.

"Gap" in completed solder joint between lead and pad

Electronics Forum | Tue Nov 28 15:10:50 EST 2006 | M. Sanders

Unfortunately, I don't have a copy of IPC-A-610 D on hand, however, I believe in IPC-610, this �floating height� between lead and pad has no maximum specification restriction. As long as there is no voiding, it is still acceptable for all 3 classes.

Tin Lead BGAs in leadfree paste

Electronics Forum | Tue Mar 07 14:18:32 EST 2006 | James

Billy, I have to disagree with you. We inadvertently soldered a Pb BGA with SAC305 paste and then had it micro sectioned and spectrum analyzed. Imagine our surprise when we saw the spectrum analysis showed Pb. The micro sections showed none to ac

Big Holes (no Pun intended) in the IPC610D Criteria for Shrink/t

Electronics Forum | Fri Feb 17 13:10:34 EST 2006 | amol_kane

I have Immersion Ag and Immersion Sn LF boards that were waved using SAC305 alloy. I have a lot of tears/shrink voids in the waved connections. I am aware that SAC305 in wave has a propensity of shrink tears/voids due to the non eutectic property of

How to Differentiate Class 3 and Class 2 products in terms of process

Electronics Forum | Mon Jan 12 21:31:26 EST 2015 | warwolf

The closer your inspection the more defects you will find, the more rework you do the possible cost you will add and the potential increase of damage you could do to your products if rework is not up to a machine copyable standard. "Is there any in

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