Electronics Forum: ipc-a-610 testing questions[0] (Page 1 of 4)

warpage dtandard

Electronics Forum | Sun Aug 24 08:57:56 EDT 2008 | davef

For an nate measurement method, look here http://www.ipc.org/4.0_Knowledge/4.1_Standards/test/2.4.22c.pdf For bare boards, look to IPC-6012, par. 3.4.4 For assemblies, look to IPC-A-610

Electrostatic Discharge due to Compressed Air

Electronics Forum | Thu Jul 07 01:26:34 EDT 2016 | lukvel

I have not tested whether there is electrostatic discharge on the PCB or not because the electrostatic meter is still on its way. But the IPC-A-610 section 3.1.2 specifies that yes even compressed air nozzles that move air over insulating surfaces g

Solder joint strength

Electronics Forum | Wed Oct 06 03:18:01 EDT 2004 | Joseph

Dear all, Recently our customer complaint that some components being came off from the pcba after dropping test.But the curious is, the leads show visible solder fillet covering more than 75% of termination area on pad, which is acceptable as per IP

QFN's and LGA's

Electronics Forum | Wed May 20 17:56:51 EDT 2009 | dyoungquist

I have attached a pdf showing the dimensions for the QFN we placed. First, The pins on the part are not only on the bottom side but also wrap around to come up each of the 4 sides of the part as shown in the side view in the attached pdf. This i

What is the best IPC standard to refer to for Cleaning of Printed Board Assemblies? Thanks, Joe

Electronics Forum | Thu Mar 14 15:55:34 EDT 2024 | davef

Process Requirement Standard - J-STD-001 - Requirements for soldered electrical and electronic assemblies depicting minimum end product acceptable characteristics as well as methods for evaluation (test methods), frequency of testing and applicable a

SMD flatness standard

Electronics Forum | Mon Nov 20 19:49:03 EST 2006 | davef

Sorry for stating this incorrectly. It should been: Bow & twist for bare boards and panels: IPC-A-610 Acceptability of Electronic Assemblies, 10.6: 1.5% for PTH only and 0.75% for SMT, acording to test method TM-650, method 2.4.22 IPC-6012, par. 3.

Wave Cassettes and Heat convection

Electronics Forum | Mon Jan 15 11:41:56 EST 2007 | davef

Questions are: * Does the component take solder when you dip it in the solder pot to test the solderability of the leads? * Can you get full barrel fill when wave soldering a bare board? * Is your flux reaching the top of the board through the hole b

Touch-up and inspection of visual defects

Electronics Forum | Mon Apr 25 11:24:31 EDT 2005 | Daan Terstegge

I have a question about inspection, touch-up, and how far you need to go to get a product that meets the required IPC-spec. According to some reports (i.e. "New Study Reveals Component Defect Levels" by Stig Oresjo of Agilent) the average defect leve

Voids in SMD reflowed solder joints

Electronics Forum | Tue Jul 02 02:50:55 EDT 2002 | ianchan

Hi mates, was going thru the IPC-A-610C Standards, and noted BGA voids stands somewhere between 10%-25% voids permissible in the solder "ball" bump, after reflow process. Was wondering, hypothetical case study, is there any specification for voids

Wave Cassettes and Heat convection

Electronics Forum | Tue Jan 16 07:07:17 EST 2007 | tk380514

Answers: The component does take solder, no problem We get a full barrel fill with an empty PCB but only on one of the holes, the other hole has so much copper around it. The flux reached the top of the PCB when I tested the empty PCB. The IPC-A-610

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