Electronics Forum | Mon Apr 10 16:18:56 EDT 2000 | Mark Belec
I need some input to clear up some confusion I have with regards to what standard I should be using for workmanship on the pcb assemblies we produce. Should I be using the IPC 610b or the ANSI-J-STD-001B? What is the norm for the industry or is the
Electronics Forum | Thu May 31 10:40:30 EDT 2001 | davef
See, all those bad thoughts we had ... The guilt, how do we live with it? 3 Spec Fir Tree General Technical Specification 3a Design/Layout: IPC-2221 IPC-2222 3b PCB Fab: IPC-6011 IPC-6012 IPC-4101 IPC-A-600 3c PCB assembly: J-STD-001 IPC-A-6
Electronics Forum | Fri Apr 03 08:25:11 EST 1998 | Scott Cook
| Does anyone know what the military uses for water | soluable flux in their wave solder process: | - wave flux | - rework flux | - cored solder | and approval steps to go through to qualify it. | Any information is appreciated. Thank you. Sylvia
Electronics Forum | Tue Feb 24 18:21:52 EST 1998 | Graham Naisbitt
You should refer to the IPC-J-STD001B and IPC-TM-650, they will give you good recommendations. Also, we do new reliability test systems and if you can give me your address and e-mail, I will send you some more info. Regards, Graham Naisbitt | looking
Electronics Forum | Sat Sep 29 08:19:16 EDT 2001 | davef
The current version of ANSI/J-STD-001, "Requiremnts For Soldered Electrical & Electronis Assemblies" is C [3/00]. The following sources can help you: * IPC http://www.ipc.org * SMTA http://www.smta.org * Document Center http://www.document-center.c
Electronics Forum | Sun Feb 03 08:44:25 EST 2002 | davef
There is no standard for baking an assembled board prior to BGA rework, nor should there be. The amount of time required to bake a board varies with: * Board material. * Board construction and layers. * Board size. * Components on the board. If som
Electronics Forum | Thu Aug 22 07:48:30 EDT 2002 | Dave Milk
While separating individual pcbs from a panel, operators have caused delamination of the edge of the board, at the tabs that were cut. How can these boards be repaired? The delamination causes them to fail J-STD-001C 9.2.1.1.d. Also, what would yo
Electronics Forum | Thu Dec 05 22:46:39 EST 2002 | davef
While J-STD-001 specifies an upper limit for acceptance of assembly, we use Resistivity Of Solvent Extract testing as a process control. In truth, this "LT 10.07 �gm/sg in NaCl equivalent" measurement has substantial limitations, not the least of wh
Electronics Forum | Wed Mar 12 10:25:29 EST 2003 | davef
J-STD-001C, 7.2.1 Flux Application says words to the effect of: When an external flux is used in conjunction with flux cored solders, the fluxes shall be compatible. Regardless of whether these are or not flux cored solders, this begs the question:
Electronics Forum | Tue Oct 07 08:38:05 EDT 2003 | davef
J-STD-001C requires removal of gold from (through-hole) component leads when the thickness of the gold layer is above 2.5 microns to prevent problems with embrittlement. The thickness of gold on an ENIG board typically is around 0.05 micron, resultin
