Electronics Forum: leaded pcb laminate (Page 10 of 147)

Tg and reflow

Electronics Forum | Fri Dec 16 18:37:10 EST 2005 | mdemos1

Hi. I am trying to understand Tg and how it relates to reflow. With the higher temperatures of lead free, we have been looking toward laminates with a Tg of 180 instead of the current 140. My question is a little more general. In either lead free

PCB Delamination

Electronics Forum | Thu May 31 22:35:23 EDT 2012 | jacktan

I have encountered PCB delam issue with high density PCB. PCB has 42 layers , 5 mm thickness ,laminate material is NelcoN4000-13EP,Tg 210C and Td 350C. Have pre-bake at 125 c for 12 hrs before assy.My reflow temp is standard with 243 peak and TAL is

BGA Pad Cratering

Electronics Forum | Sun Jun 07 09:01:47 EDT 2009 | davef

IPC T-50, Revision H, Terms and Definitions for Interconnecting and Packaging Electronic Circuits, 96.2176 Pad Cratering. A separation of the pad from the printed board resin/weave composite or within the composite immediately adjacent to the pad as

Tg and reflow

Electronics Forum | Mon Dec 19 07:29:30 EST 2005 | jax

Tg is just a way to say when the board goes limp... or a quick way to rank laminates... who cares. For lead free you want to look at Td, Decomposition Temperatures. ( Temp at which the material weight changes by 5% )

TUC622 vs IS410

Electronics Forum | Tue Jun 13 14:16:56 EDT 2006 | adlsmt

Is anyone aware of any standard for bare board laminate for lead free assembly? We have been using IS410 with good results but not sure if maybe it is overkill and not worth the price premium? What is everyone else using?

Laser solder reflection

Electronics Forum | Thu Nov 22 09:14:06 EST 2007 | paulallan

Does anyone have any experience in point to point laser soldering and laser light reflecting off of SMT component 'J' leads down on to the laminate. This appears to be a random situation we cannot understand nor control.

BGA cracking

Electronics Forum | Thu Sep 25 16:50:50 EDT 2008 | glennster

Ditto here, also. This is generally referred to as �cratering,� and is associated with stress on boards from operations such as ICT, installation of compliant pin connectors, and depanelization. It is more common on PCBs designed for Lead-free proc

hole blister

Electronics Forum | Fri Sep 18 09:22:03 EDT 2009 | ysutariya

Don't forget the possibility of excess moisture absorption. If this is lead free, then the laminate manufacturers state that you should bake prior to assembly. Was this completed?

Reg: Voids in solder bumps

Electronics Forum | Wed Sep 30 11:57:19 EDT 1998 | Manish Ranjan

Hi Everybody Is anyone aware of the possible causes that may lead to voids in the solder bumps after assembly. We assembled some dice on thin substrates and after assembly, void formation in the solder bumps were observed. We have already trie

Re: Reg: Voids in solder bumps

Electronics Forum | Wed Oct 07 15:25:02 EDT 1998 | Joe P.

Hi Everybody | | Is anyone aware of the possible causes that may lead to voids in the solder bumps after assembly. We assembled some dice on thin substrates and after assembly, void formation in the solder bumps were observed. | We have alread


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