Electronics Forum | Mon Oct 11 13:44:29 EDT 1999 | Dave F
Ken: Since Earl is no longer here, I guess I'll bite on this. Your questions are very broad and difficult to answer specifically. So, I'll give you broad and non-specific answers. | Hi, | | We are using mixed technology in our PCBA. Would like to
Electronics Forum | Wed Aug 12 18:26:16 EDT 2020 | SMTA-64387117
Looking for engineers to test new desiccant technology and compare with Silica Beads. Samples provided. Additionally, engineer can work with and collaborate with "engineers only" group lead by US Military engineer for packaging. The goal is to d
Electronics Forum | Fri May 29 07:17:02 EDT 2015 | anirudh_thabjul
Hiee everyone, I am a Hardware Engineer and also a PCB designer. I am using a Microntroller which is in "CHIP PACKAGE". So in order to connect our microcontroller with my PCB, i am using "Wire bonding Technology". So, Can any one suggust 1. whi
Electronics Forum | Wed Jan 16 21:07:26 EST 2002 | davef
We looked at buying a scanner set-up a few years ago, but could not justify it. So, we use contract scanners, like: Advance Reproductions Corp 100 Flagship Dr.,NAndover, MA 01845 508 685 2911 fax 9564/201 697 1339 Martin Crowley Rep 201 697 1339 Sca
Electronics Forum | Tue Oct 05 14:38:06 EDT 1999 | Debbie Alavezos
| | Hi, | | | | Help! Could anyone help to enlighten me on this? | | | | Question: | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a n
Electronics Forum | Wed Sep 12 18:11:03 EDT 2001 | davef
First, what on the area array package are you analyzing � * Package cracking? * Cracked solder balls? * Er, what? Second, most failure analysis discussions consider dye penetration to be a non-destructive test, but then again most failure analysis
Electronics Forum | Thu Jan 06 09:01:53 EST 2005 | Indy
go to the web site of "Lamina Ceramics". They have proprietary packaging technology for LED packaging. Indy
Electronics Forum | Mon Aug 13 12:03:50 EDT 2007 | davef
Test results indicated that the life of lead-free solder at a 2512 chip resistor could be worse than of SnPb solder in the accelerated thermal cycling condition. [Development of Life Prediction Model for Lead-free Solder at Chip Resistor, Changwoon H
Electronics Forum | Sat Jul 29 09:10:16 EDT 2006 | davef
Ball Grid Array (BGA). A surface mount technology leadless package with the connectors to the board placed in an array on the bottom of the package. They are attached to the board with tiny balls of solder placed on each contact. Pin Grid Array (P
Electronics Forum | Tue Sep 07 16:58:16 EDT 2004 | davef
Au contraire, mon ami. Although there is not "BGA" solderability test specified in J-STD-002A, the Test S can be used to assess solderability on BGA packages. [Joint Soldering Technology Committee ]
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