Electronics Forum | Mon Jun 15 06:21:13 EDT 2020 | ameenullakhan
Hi Team, Main reason for HIP are; 1. Warpage in component or PCB : Verified the part and PCB 1.6 mm thickness no warpage found. 2. Hip was at different locations : center as well as corner : So not because of warpage of component. 3.Solder paste equ
Electronics Forum | Wed Sep 15 13:55:06 EDT 2004 | dave
Due to some reason there are few balls of the BGA left open during the process. Reflow profile has been verified. There are other BGAs on the PCB and they are fine too. The BGA in question has a very large metal heat sink on top of it and is placed r
Electronics Forum | Thu Apr 07 14:07:11 EDT 2005 | Tater
Both methods are fine, but you should create or use a spec that fits your process needs. You should also consider if this warp will directly impact the performance of your final product once it's completely built. Then make sure your customer won't
Electronics Forum | Wed Nov 01 08:02:16 EST 2000 | Wolfgang Busko
Massimo: Do you encounter or see warpage of the device or the PCB, I think I remember that there was a thread about this topic of shorts of the corner pins of BGA. You might try the archive. Wolfgang
Electronics Forum | Wed Dec 04 04:29:51 EST 2002 | CH
U might need to run the board on a reflow pallet with a clamper. This will help to solve the warpage problem on the PCB and connector.
Electronics Forum | Tue May 06 06:29:06 EDT 2003 | yukim
Hi, No, the layout is different, but both have chips located arallel and perpendicularly to the flow direction. And we do have defects in both orientation. What about the PCB warpage? Sometimes we find warped PCBs. Could this affect? Thanks, Yu.
Electronics Forum | Fri Apr 08 04:48:34 EDT 2005 | vinitverma
7mils/inch is 0.7% and the IPC-A-610 calls for 0.75% (for SMT), so both are approx. the same. So there are no two methods in what you described. The 7mil/inch is also a percentage. Regards Vinit
Electronics Forum | Tue Jun 20 06:47:53 EDT 2006 | Julien VITTU (STMicro)
hung copper balance is really critical in your case. in the same configuration we have specified less than 5% copper variation between top and bottom layer if you keep this rule, assembly will be ok, otherwise you will get a terrible warpage after
Electronics Forum | Wed May 02 12:12:23 EDT 2007 | SWAG
Restrictive carriers or lack of carrier in reflow can cause board warpage = bad for BGA's. Might be something to look at.
Electronics Forum | Fri Jul 13 17:01:50 EDT 2007 | sean10
Thanks for your inputs. The board construction seams to be balanced and boards comes back to flat after top side process. we'll be performing experiement variing the profile parameters. if that does not do it, any printing suggestings? Would more sq
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